ZLF645S0P2032G Zilog, ZLF645S0P2032G Datasheet - Page 62

• Manufacturer Part Number: ZLF645S0P2032G
• Description: Microcontrollers (MCU) 32K Flash 512B RAM 20 pin
• Manufacturer: Zilog

Specifications of ZLF645S0P2032G

• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 512 KB
• Interface Type: ICP, UART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Package / Case: PDIP-20
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details

Enabling Flash Accesses Through the ICP
ICP Interface Logic Architecture
ICP Interface Operation
PS026407-0408
System Clock
ICP Pin
After the ZLF645 is in ICP mode, the
programmed to 1 before Flash accesses are enabled through the ICP interface.
The ICP logic within the ZLF645 MCU consists of four primary functional blocks: trans-
mitter, receiver, auto-baud detector/generator, and Flash Controller interface.
displays the architecture of the ICP.
After the ZLF645 MCU is in ICP mode, pin P34 acts a bidirectional open-drain interface
with internal pull-ups used for transmitting and receiving the data. Data transmission is
half-duplex, in that transmit and receive cannot occur simultaneously. Serial data on P34 is
sent using the standard asynchronous data format defined in RS-232. This pin creates an
interface from the ZLF645 MCU to the serial port of a host PC using minimal external
hardware.
RS-232 connection using an open-drain buffer. The ICP pin must always be connected to
V
DD
through an external pull-up resistor.
Figure 17
Figure 16. In-Circuit Programmer Block Diagram
Detector/Generator
Auto-Baud
displays the recommended method of connecting P34 pin to an
Transmitter
Receiver
FLASHCTL
bit of the ICP Control register must be
Enabling Flash Accesses Through the ICP
ZLF645 Series Flash MCUs
Product Specification
Flash Controller
Interface
Figure 16
54