ZLF645S0P2032G Zilog, ZLF645S0P2032G Datasheet - Page 54

• Manufacturer Part Number: ZLF645S0P2032G
• Description: Microcontrollers (MCU) 32K Flash 512B RAM 20 pin
• Manufacturer: Zilog

Specifications of ZLF645S0P2032G

• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 512 KB
• Interface Type: ICP, UART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Package / Case: PDIP-20
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details

PS026407-0408
Note:
Example
For example, the following code uses linear addressing for the source of a register transfer
operation and uses a working register address for the target:
The LDE and LDEI instructions that existed in the Z8 CPU are no longer valid; they have
been replaced by the LDX and LDXI instructions.
SRP #%23
LD R0, #%55
SRP #%12
LD R6, #%03
LD R7, #%20
LD R0, @RR6
In the above code, the source register is referred through a linear address value contained
within registers R6 and R7, whereas the destination is referenced via the SRP setting and a
working register. For more information about instructions on the usage of LDX and LDXI
instructions, refer to Z8
;Set working register group 2 in bank 3
;Load 55 into working register R0 in the current
;group and bank (linear address 320h)
;Set working register group 1 in bank 2
;Load high byte of source linear address (0320h)
;Load low byte of source linear address (0320h)
;Load linear address 320h contents (55h) into
;working register R0 in the current group and
;bank (linear address 210h)
®
LXMC CPU Core User Manual (UM0215).
ZLF645 Series Flash MCUs
Product Specification
Register File
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