WJLXT972ALC.A4 Intel, WJLXT972ALC.A4 Datasheet - Page 40

• Manufacturer Part Number: WJLXT972ALC.A4
• Description: IC TRANS 3.3V ETHERNET 64-LQFP
• Manufacturer: Intel
• Type: Transceiverr

Specifications of WJLXT972ALC.A4

• Number Of Drivers/receivers: 1/1
• Protocol: IEEE 802
• Voltage - Supply: 3.14 V ~ 3.45 V
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 857341

LXT972M PHY
Datasheet
302875, Revision 5.3
31 October 2007
Table 16
5.7.3.2
5.7.3.2.1
5.7.3.2.2
Note:
Caution:
Cortina Systems
4B/5B Coding (Sheet 2 of 2)
Physical Medium Attachment Sublayer
Link
In 100 Mbps mode, link is established when the descrambler becomes locked and
remains locked for approximately 50 ms. Link remains up unless the descrambler
receives less than 16 consecutive idle symbols in any 2 ms period. This operation filters
out small noise hits that may disrupt the link.
For short periods, MLT-3 idle waveforms meet all criteria for 10BASE-T start delimiters. A
working 10BASE-T receive may temporarily indicate link to 100BASE-TX waveforms.
However, the PHY does not bring up a permanent 10 Mbps link.
The LXT972M PHY reports link failure through the MII status bits (register bits 1.2 and
17.10). Link failure causes the LXT972M PHY to re-negotiate if auto-negotiation is
enabled.
Link Failure Override
The LXT972M PHY normally transmits data packets only if it detects the link is up. Setting
register bit 16.14 = 1 overrides this function, allowing the LXT972M PHY to transmit data
packets even when the link is down. This feature is provided as a transmit diagnostic tool.
Auto-negotiation must be disabled to transmit data packets in the absence of link. If auto-
negotiation is enabled, the LXT972M PHY automatically transmits FLP bursts if the link is
down.
During normal operation, Cortina does not recommend setting register bit 16.14 for
100 Mbps receive functions because receive errors may be generated.
®
1. The /I/ (Idle) code group is sent continuously between frames.
2. The /J/ and /K/ (SSD) code groups are always sent in pairs, and /K/ follows /J/.
3. The /T/ and /R/ (ESD) code groups are always sent in pairs, and /R/ follows /T/.
4. An /H/ (Error) code group is used to signal an error condition.
Code Type
LXT972M Single-Port 10/100 Mbps PHY Transceiver
INVALID
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
4B Code
3 2 1 0
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Name
H
4
4 3 2 1 0
5B Code
0 0 1 0 0
0 0 0 0 0
0 0 0 0 1
0 0 0 1 0
0 0 0 1 1
0 0 1 0 1
0 0 1 1 0
0 1 0 0 0
0 1 1 0 0
1 0 0 0 0
1 1 0 0 1
Transmit Error. Used to force signaling
errors
Interpretation
5.7 100 Mbps Operation
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
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