PSMN3R5-80ES,127 NXP Semiconductors, PSMN3R5-80ES,127 Datasheet - Page 9
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PSMN3R5-80ES,127
Manufacturer Part Number
PSMN3R5-80ES,127
Description
MOSFET Power N-Ch 80V 3.5 mOhms
Manufacturer
NXP Semiconductors
Series
-r
Datasheet
1.PSMN3R5-80ES127.pdf
(15 pages)
Specifications of PSMN3R5-80ES,127
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
3.5 mOhms
Drain-source Breakdown Voltage
80 V
Gate-source Breakdown Voltage
20 V
Continuous Drain Current
120 A
Power Dissipation
338 W
Maximum Operating Temperature
+ 175 C
Mounting Style
SMD/SMT
Package / Case
I2PAK
Gate Charge Qg
135 nC
Minimum Operating Temperature
- 55 C
Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Standard
Rds On (max) @ Id, Vgs
3.5 mOhm @ 25A, 10V
Drain To Source Voltage (vdss)
80V
Current - Continuous Drain (id) @ 25° C
120A
Vgs(th) (max) @ Id
4V @ 1mA
Gate Charge (qg) @ Vgs
139nC @ 10V
Input Capacitance (ciss) @ Vds
9961pF @ 40V
Power - Max
338W
Mounting Type
Through Hole
Lead Free Status / Rohs Status
Details
Other names
934065163127
NXP Semiconductors
PSMN3R5-80ES
Product data sheet
Fig 13. Drain-source on-state resistance as a function
Fig 15. Gate-source voltage as a function of gate
R
(mΩ)
DSon
V
(V)
12.5
GS
7.5
2.5
7.5
2.5
10
15
10
5
0
5
0
of drain current; typical values
charge; typical values
0
0
V
DS
10
40
= 16V
40V
80
20
64V
V
GS
(V) = 4.5
120
30
All information provided in this document is subject to legal disclaimers.
Q
003aaf612
003aaf609
I
D
G
(A)
(nC)
5.5
6.0
20.0
160
40
Rev. 02 — 19 April 2011
N-channel 80 V, 3.5 mΩ standard level MOSFET in I2PAK
Fig 14. Gate charge waveform definitions
Fig 16. Input, output and reverse transfer capacitances
(pF)
C
10
10
10
10
10
5
4
3
2
10
as a function of drain-source voltage; typical
values
V
-1
V
V
V
GS(pl)
DS
GS(th)
GS
Q
GS1
1
I
Q
PSMN3R5-80ES
D
GS
Q
GS2
Q
G(tot)
Q
GD
10
V
© NXP B.V. 2011. All rights reserved.
DS
003aaf610
003aaa508
(V)
C
C
C
oss
rss
iss
10
2
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