DS26514GN+ Maxim Integrated Products, DS26514GN+ Datasheet - Page 262
![IC TXRX T1/E1/J1 4PORT 256-CSBGA](/photos/6/50/65053/256-csbga_21-0315_sml.jpg)
DS26514GN+
Manufacturer Part Number
DS26514GN+
Description
IC TXRX T1/E1/J1 4PORT 256-CSBGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet
1.DS26514GN.pdf
(305 pages)
Specifications of DS26514GN+
Number Of Drivers/receivers
4/4
Protocol
Ethernet
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
256-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Register Name:
Register Description:
Register Address:
Bit #
Name
Bit 7: Receive FIFO Overflow Latched (RFOL) – This bit is set when a Receive FIFO overflow condition occurs.
An overflow condition results in a loss of data.
Bit 4: Receive Packet End Latched (RPEL) – This bit is set when an end of packet is stored in the Receive FIFO.
Bit 3: Receive Packet Start Latched (RPSL) – This bit is set when a start of packet is stored in the Receive FIFO.
Bit 2: Receive FIFO Full Latched (RFFL) – This bit is set when the RFF bit transitions from 0 to 1.
Bit 0: Receive HDLC Data Available Latched (RHDAL) – This bit is set when the RHDA bit transitions from
0 to 1.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: Receive FIFO Overflow Interrupt Enable (RFOIE) – This bit enables an interrupt if the RFOL bit is set.
Bit 4: Receive Packet End Interrupt Enable (RPEIE) – This bit enables an interrupt if the RPEL bit is set.
Bit 3: Receive Packet Start Interrupt Enable (RPSIE) – This bit enables an interrupt if the RPSL bit is set.
Bit 2: Receive FIFO Full Interrupt Enable (RFFIE) – This bit enables an interrupt if the RFFL bit is set.
Bit 0: Receive HDLC Data Available Interrupt Enable (RHDAIE) – This bit enables an interrupt if the RHDAL bit
is set and.
Rev: 101608
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
RFOL
RFOIE
7
7
0
--
--
6
6
0
RH256SRL
Receive HDLC-256 Status Register Latched
1516h + (20h x (n-1)) : where n = 1 to 4
RH256SRIE
Receive HDLC-256 Status Register Interrupt Enable
1518h + (20h x (n-1)) : where n = 1 to 4
--
--
5
5
0
RPEIE
RPEL
4
4
0
RPSIE
RPSL
3
3
0
DS26514 4-Port T1/E1/J1 Transceiver
RFFIE
RFFL
2
2
0
--
--
1
1
0
RHDAIE
RHDAL
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