STM32W108C8U63TR STMicroelectronics, STM32W108C8U63TR Datasheet - Page 165
STM32W108C8U63TR
Manufacturer Part Number
STM32W108C8U63TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32W108C8U63TR.pdf
(207 pages)
Specifications of STM32W108C8U63TR
Applications
RF4CE, Remote Control
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (64 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
24
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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STM32W108C8
11.3.3
11.3.4
31
15
31
15
30
14
30
14
Bits [15:0] ADC_GAIN_FIELD: Gain factor that is multiplied by the offset-corrected ADC result to produce
ADC gain register (ADC_GAIN)
Address offset: 0xD00C
Reset value:
ADC DMA configuration register (ADC_DMACFG)
Address offset: 0xD010
Reset value:
Bit 4 ADC_DMARST: Write 1 to reset the ADC DMA. This bit auto-clears.
Bit 1 ADC_DMAAUTOWRAP: Selects DMA mode.
Bit 0 ADC_DMALOAD: Loads the DMA buffer.
29
13
29
13
the output value. The gain is a 16-bit unsigned scaled integer value with a binary decimal point
between bits 15 and 14. It can represent values from 0 to (almost) 2. The reset value is a gain
factor of 1.
0: Linear mode, the DMA stops when the buffer is full.
1: Auto-wrap mode, the DMA output wraps back to the start when the buffer is full.
Write 1 to start DMA (writing 0 has no effect). Cleared when DMA starts or is reset.
28
12
28
12
27
11
27
11
0x0000 8000
0x0000 0000
Reserved
26
10
26
10
25
25
9
9
Doc ID 018587 Rev 1
ADC_GAIN_FIELD
24
24
8
8
Reserved
Reserved
rw
23
23
7
7
22
22
6
6
21
21
5
5
DMAR
ADC_
ST
20
20
w
4
4
Analog-to-digital converter
19
19
3
3
Reserved
18
18
2
2
UTOW
DMAA
ADC_
RAP
17
17
rw
1
1
165/207
ADC_
DMAL
OAD
16
16
rw
0
0
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