STM32W108C8U63TR STMicroelectronics, STM32W108C8U63TR Datasheet - Page 101
STM32W108C8U63TR
Manufacturer Part Number
STM32W108C8U63TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32W108C8U63TR.pdf
(207 pages)
Specifications of STM32W108C8U63TR
Applications
RF4CE, Remote Control
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (64 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
24
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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STM32W108C8
9.13.8
9.13.9
9.13.10
31
15
31
15
31
15
Reserved
Reserved
Reserved
30
14
30
14
30
14
Bits [12:0] SC_TXCNT: The offset from the start of the active DMA transmit buffer from which the next byte
Bits [12:0] SC_RXBEGA: DMA receive buffer A start address.
Bits [12:0] SC_RXBEGB: DMA receive buffer B start address.
Receive DMA begin address register A (SCx_RXBEGA)
Address offset: 0xC800 (SC1_RXBEGA) and 0xC000 (SC2_RXBEGA)
Reset value:
Receive DMA begin address register B (SCx_RXBEGB)
Address offset: 0xC808 (SC1_RXBEGB) and 0xC008 (SC2_RXBEGB)
Reset value:
Receive DMA end address register A (SCx_RXENDA)
Address offset: 0xC804 (SC1_RXENDA) and 0xC004 (SC2_RXENDA)
Reset value:
29
13
29
13
29
13
will be read. This register is set to zero when the buffer is loaded and when the DMA is reset.
28
12
28
12
28
12
27
11
27
11
27
11
0x2000 0000
0x2000 0000
0x0000 0000
26
10
26
10
26
10
25
25
25
9
9
9
Doc ID 018587 Rev 1
24
24
24
8
8
8
Reserved
Reserved
Reserved
23
23
23
7
7
7
SC_RXBEGA
SC_RXBEGB
SC_RXENDA
22
22
22
6
6
6
rw
rw
rw
21
21
21
5
5
5
20
20
20
4
4
4
19
19
19
3
3
3
Serial interfaces
18
18
18
2
2
2
17
17
17
1
1
1
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16
16
16
0
0
0
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