SI3019-F-FTR Silicon Laboratories Inc, SI3019-F-FTR Datasheet - Page 64

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SI3019-F-FTR

Manufacturer Part Number
SI3019-F-FTR
Description
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI3019-F-FTR

Lead Free Status / Rohs Status
Compliant

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64
Bit
1
0
Name
TGDI
POLI
TIP Ground Detect Interrupt.
This bit is reverse logic as compared to the TGD bit.
0 = The CO has not grounded TIP causing current to flow.
1 = The CO has grounded TIP, causing current to flow. Once set, this bit must be written to 0
to clear it. If the TDGM bit (Register 3) and INTE bit (Register 3) are set, a hardware interrupt
occurs on the AOUT/INT pin. To clear the interrupt, write this bit to 0.
Polarity Reversal Detect Interrupt (Si3019 line-side only).
0 = Bit 7 of the LVS register has not changed states.
1 = Bit 7 of the LVS register has transitioned from 0 to 1, or from 1 to 0, indicating the polarity
of TIP and RING is switched. If the POLM bit (Register 3) and INTE bit (Register 2) are set, a
hardware interrupt occurs on the AOUT/INT pin. To clear the interrupt, write this bit to 0.
Rev. 1.31
Function

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