AD5755-1ACPZ Analog Devices Inc, AD5755-1ACPZ Datasheet - Page 32

16Bit Quad,V/I DAC No Dynamic Power Ctrl

AD5755-1ACPZ

Manufacturer Part Number
AD5755-1ACPZ
Description
16Bit Quad,V/I DAC No Dynamic Power Ctrl
Manufacturer
Analog Devices Inc
Series
-r
Datasheet

Specifications of AD5755-1ACPZ

Input Channel Type
Serial
Data Interface
3-Wire, Serial
Supply Voltage Range - Digital
2.7V To 5.5V
Digital Ic Case Style
LFCSP
No. Of Pins
64
Operating Temperature Range
-40°C To +105°C
Rohs Compliant
Yes
Resolution (bits)
16bit
Supply Voltage Range - Analog
2.7V To 5.5V
Featured Product
AD5755 / AD5755-1 / AD5757 DACs
Settling Time
11µs
Number Of Bits
16
Number Of Converters
4
Voltage Supply Source
Analog and Digital, Dual ±
Power Dissipation (max)
-
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
64-VFQFN Exposed Pad, CSP
Number Of Outputs And Type
4 Current, 4 Voltage
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD5755-1ACPZ-REEL7
Manufacturer:
AD
Quantity:
201
AD5755-1
DATA REGISTERS
The input register is 24 bits wide. When PEC is enabled, the
input register is 32 bits wide, with the last eight bits correspond-
ing to the PEC code (see the Packet Error Checking section for
more information on PEC). When writing to a data register, the
format in Table 8 must be used.
Table 8. Writing to a Data Register
MSB
D23
R/W
Table 9. Input Register Decode
Bit
R/W
DUT_AD1, DUT_AD0
DREG2, DREG1, DREG0
DAC_AD1, DAC_AD0
Table 10. Programming the DAC Data Registers
MSB
D23
R/W
D22
DUT_AD1
D22
DUT_AD1
D21
DUT_AD0
Description
Indicates a read from or a write to the addressed register.
Used in association with the external pins, AD1 and AD0, to determine which AD5755-1 device is being
addressed by the system controller.
DUT_AD1
0
0
1
1
Selects whether a data register or a control register is written to. If a control register is selected, a further decode
of CREG bits (see Table 17) is required to select the particular control register, as follows.
DREG2
0
0
0
1
1
1
1
These bits are used to decode the DAC channel.
DAC_AD1
0
0
1
1
X
D21
DUT_AD0
DUT_AD0
0
1
0
1
DREG1
0
1
1
0
0
1
1
DAC_AD0
0
1
0
1
X
D20
DREG2
D20
DREG2
D19
DREG1
D19
DREG1
Function
Addresses part with Pin AD1 = 0, Pin AD0 = 0
Addresses part with Pin AD1 = 0, Pin AD0 = 1
Addresses part with Pin AD1 = 1, Pin AD0 = 0
Addresses part with Pin AD1 = 1, Pin AD0 = 1
DREG0
0
0
1
0
1
0
1
DAC Channel/Register Address
DAC A
DAC B
DAC C
DAC D
These are don’t cares if they are not relevant to the operation being performed.
Rev. A | Page 32 of 48
D18
DREG0
D18
DREG0
Function
Write to DAC data register (individual channel write)
Write to gain register
Write to gain register (all DACs)
Write to offset register
Write to offset register (all DACs)
Write to clear code register
Write to a control register
DAC Data Register
When writing to the AD5755-1 DAC data registers, D15 to D0
are used for DAC data bits. Table 10 shows the register format
and Table 9 describes the function of Bit D23 to Bit D16.
D17
DAC_AD1
D17
DAC_AD1
D16
DAC_AD0
D16
DAC_AD0
LSB
D15 to D0
Data
LSB
D15 to D0
DAC data

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