AD5755-1ACPZ Analog Devices Inc, AD5755-1ACPZ Datasheet - Page 30

• Manufacturer Part Number: AD5755-1ACPZ
• Description: 16Bit Quad,V/I DAC No Dynamic Power Ctrl
• Manufacturer: Analog Devices Inc
• Series: -r

Specifications of AD5755-1ACPZ

• Input Channel Type: Serial
• Data Interface: 3-Wire, Serial
• Supply Voltage Range - Digital: 2.7V To 5.5V
• Digital Ic Case Style: LFCSP
• No. Of Pins: 64
• Operating Temperature Range: -40°C To +105°C
• Rohs Compliant: Yes
• Resolution (bits): 16bit
• Supply Voltage Range - Analog: 2.7V To 5.5V
• Featured Product: AD5755 / AD5755-1 / AD5757 DACs
• Settling Time: 11µs
• Number Of Bits: 16
• Number Of Converters: 4
• Voltage Supply Source: Analog and Digital, Dual ±
• Power Dissipation (max): -
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 64-VFQFN Exposed Pad, CSP
• Number Of Outputs And Type: 4 Current, 4 Voltage
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

AD5755-1
REGISTERS
Table 7 shows an overview of the registers for the AD5755-1.
Table 7. Data, Control, and Readback Registers for the AD5755-1
Register
Data
Control
Readback
DAC Data Register (×4)
Gain Register (×4)
Offset Register (×4)
Clear Code Register (×4)
Main Control Register
Software Register
Slew Rate Control Register (×4)
DAC Control Register (×4)
DC-to-DC Control Register
Status Register
Description
Used to write a DAC code to each DAC channel. AD5755-1 data bits = D15 to D0. There are four DAC
data registers, one per DAC channel.
Used to program gain trim, on a per channel basis. AD5755-1 data bits = D15 to D0. There are four
gain registers, one per DAC channel.
Used to program offset trim, on a per channel basis. AD5755-1 data bits = D15 to D0. There are four
offset registers, one per DAC channel.
Used to program clear code on a per channel basis. AD5755-1 data bits = D15 to D0. There are four
clear code registers, one per DAC channel.
Used to configure the part for main operation. Sets functions such as status readback during write,
enables output on all channels simultaneously, powers on all dc-to-dc converter blocks
simultaneously, and enables and sets conditions of the watchdog timer. See the Device Features
section for more details.
Has three functions. Used to perform a reset, to toggle the user bit, and, as part of the watchdog timer
feature, to verify correct data communication operation.
Used to program the slew rate of the output. There are four slew rate control registers, one per
channel.
These registers are used to control the following:
Set the output range, for example, 4 mA to 20 mA, 0 V to 10 V.
Set whether an internal/external sense resistor is used.
Enable/disable a channel for CLEAR.
Enable/disable overrange.
Enable/disable internal circuitry on a per channel basis.
Enable/disable output on a per channel basis.
Power on dc-to-dc converters on a per channel basis.
There are four DAC control registers, one per DAC channel.
Use to set the dc-to-dc control parameters. Can control dc-to-dc maximum voltage, phase, and
frequency.
This contains any fault information, as well as a user toggle bit.
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