PEB3086FV14NP Lantiq, PEB3086FV14NP Datasheet - Page 234

PEB3086FV14NP

Manufacturer Part Number
PEB3086FV14NP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEB3086FV14NP

Control Interface
HDLC
Lead Free Status / Rohs Status
Not Compliant
ISAC-SX
PEB 3086
Electrical Characteristics
5.6
IOM-2 Interface Timing
Data is transmitted with the rising edge of DCL and sampled with its falling edge. Below
figure shows double clock mode timing (the length of a timeslot is 2 DCL cycles),
however, the timing parameters are valid both in single and double clock mode. For the
direction of DU,DD (input or output) please refer to
Chapter
3.4.
Figure 84
IOM-2 Timing (TE mode)
Data Sheet
234
2003-01-30

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