PEB24901HV1.2 Lantiq, PEB24901HV1.2 Datasheet - Page 20

• Manufacturer Part Number: PEB24901HV1.2
• Manufacturer: Lantiq

Specifications of PEB24901HV1.2

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Figure 6: C/I-Channel Use with the EPIC
After the correct initialization of the EPIC, the C/I-code which is to be transmitted to the
IEC-T is written into the MADR-register (structure: 1 1 C/I C/I C/I C/I 1 1). With the
MAAR-register the EPIC is informed where to send this C/I-code (transmission direction,
port number and time-slot number). For a description of this register please refer to the
EPIC-manual. The example above sends the C/I-command to port 0, time-slot 0. MACR
= 48
If a change in one of the C/I-channels was observed, an ISTA-interrupt (bit SFI) is
generated. Because the user does not know in which channel the change occurred, the
location needs to be read from the CIFIFO-register. This address is copied via software
into address register MAAR. After having started the read operation with MACR = C8
the C/I-message can be read from MADR (structure as described earlier).
Semiconductor Group
H
starts the transmission of the command.
CIFIFO = 88
MACR =
MADR
MADR = C
MAAR
MACR
MAAR = 88
ISTA = 40
P
=
=
=
C8
7 C
08
48
7
SFI
1 =
Channel
Time-Slot for Reading
Return C/I-Code in
Start Transmission
Read Port and Time-
Slot No.
(port
<-
Select this Port/
MADR-Register
Read C/I-Code
C/I-Command
C/I-Command
was Received
was Received
Select Port
Downstream
New C/I-Code
EPIC -1
C/I-code)
"RESET"
0,
channel
0,
where C/I
C/I-Code
R
0,
19
®
0,
(all data values hexadecimal)
C/I
C/I = 0001b
=
0001
b
Send C/I-Indication
Transfer to "TEST"
"DEAC"
IEC-Q
State
PEB 24901
ITD04213
02.95
H