PEB24901HV1.2 Lantiq, PEB24901HV1.2 Datasheet - Page 15

• Manufacturer Part Number: PEB24901HV1.2
• Manufacturer: Lantiq

Specifications of PEB24901HV1.2

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Semiconductor Group
2
The PEB 24901 Quad IEC DFE-T is optimized to work in conjunction with the PEB 24902
Quad IEC AFE on line modules in the central office or in the LT function of the access
network . It supports the 4B3T line code. A PLL internal to the PEB 24902 Quad IEC AFE
synchronises the 15.36 MHz master clock onto a PTT reference clock of either 8 kHz,
512 kHz or 2048 kHz. The Quad IEC DFE-T receives this clock from the Quad IEC AFE.
The Quad IEC DFE-T is connected to four time slots of the IOM-2 interface. The
selection is done with the SLOT pin. The SLOT pin assigns either the IOM-slots 0 to 3
to the four channels 0 to 3 (SLOT pin low), or it assigns the IOM-slots 4 to 7 to the
channels 0 to 3 (SLOT pin high).
Figure 2 illustrates the application in a 4 channel line card together with one PEB 24902
Quad IEC AFE.
Figure 3 shows an 8 channel application. One PLL generates the synchronised clock for
all 4 devices. Note that the second PEB 24902 Quad IEC AFE receives the 15.36 MHz
clock in this application. It’s PLL is deactivated.
Figure 2: 4 channel LT application
IOM-2
System Integration
DOUT
DIN
DCL
FSC
Quad IEC DFE-T
PEB 24901
JTAG Boundary scan
15.36 MHz
PDM 0..3
SDX
SDR
14
Quad IEC AFE
PEB 24902
15.36 MHz
4 U-Interfaces
HYBRID
HYBRID
HYBRID
HYBRID
PEB 24901
02.95