PSB21384HV13XT Infineon Technologies, PSB21384HV13XT Datasheet - Page 101
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PSB21384HV13XT
Manufacturer Part Number
PSB21384HV13XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB21384HV13XT.pdf
(270 pages)
Specifications of PSB21384HV13XT
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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2.3.10
The test and diagnostic functions for the S/T interface provided by the SCOUT are
described in the following two chapters.
2.3.10.1
– The internal local loop (internal Loop A) is activated by a C/I0 ARL command or by
– The external local loop (external Loop A) is activated in the same way as the internal
Figure 55
External Loop at the S/T-Interface
Data Sheet
setting the bit LP_A (Loop Analog) in the TR_CMD register if the layer-1 statemachine
is disabled.
The transmit data of the transmitter is looped back internally to the receiver. The data
of the IOM-2 upstream B- and D-channels is looped back to the downstream B- and
D-channels.
The S/T interface awake detector is enabled, i.e. if a level is detected this will be
reported by the Resynchronization Indication (RSY) but the loop function is not
effected.
Depending on the DIS_TX bit in the TR_CONF2 register (see chapter 7.2.3) the
internal local loop can be transparent or non transparent to the S/T line.
local loop described above. Additionally the EXLP bit in the TR_CONF0 register (see
chapter 7.2.1) has to be programmed and the loop has to be closed externally as
described in figure 55.
The S/T interface awake detector is disabled.
This allows complete systems diagnostics including transformers and external
circuits.
Test Functions
Transceiver Tests
SCOUT-S(X)
SX1
SX2
SR1
SR2
91
100
100
PSB 21381/2
PSB 21383/4
Interfaces
2001-03-12
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