PSB3186FV1.4XT Infineon Technologies, PSB3186FV1.4XT Datasheet - Page 121

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PSB3186FV1.4XT

Manufacturer Part Number
PSB3186FV1.4XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB3186FV1.4XT

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
4
The register mapping of the ISAC-SX TE is shown in
Figure 69
The register address range from 00
and the C/I-channel handler.
The register set ranging from 30
The address range from 40
timeslot and data port selection (TSDP) and the control registers (CR) for the transceiver
data (TR), Monitor data (MON), HDLC/CI data (HCI) and controller access data (CDA),
serial data strobe signal (SDS), IOM interface (IOM) and synchronous transfer interrupt
(STI).
The address range from 5C
General interrupt and configuration registers are contained in the address range
60
Data Sheet
H
-65
H
.
Detailed Register Description
Register Mapping of the ISAC-SX TE
FFh
70h
60h
30h
00h
40h
H
H
-5B
-5F
H
H
H
-3F
pertains to the MONITOR handler.
is assigned to the IOM handler with the registers for
H
(Not used)
Interrupt, General Configuration
Transceiver
D- and C/I-channel
IOM-2 and MONITOR Handler
-2F
H
pertains to the transceiver registers.
H
121
is assigned to the D-channel HDLC controller
Figure
Detailed Register Description
3186_04
69.
ISAC-SX TE
PSB 3186
2003-01-30

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