PEF24902HV21XP Lantiq, PEF24902HV21XP Datasheet - Page 17

• Manufacturer Part Number: PEF24902HV21XP
• Manufacturer: Lantiq

Specifications of PEF24902HV21XP

• Number Of Line Interfaces: 1
• Lead Free Status / Rohs Status: Compliant

Table 3
Pin No. Symbol
40
8
31
18
50
63
24
41
23
25
PLL
9
10
Data Sheet
PDM2
PDM3
XDN0
XDN1
XDN2
XDN3
SDX
SDR
CODE
RES
XOUT
XIN
Pin Definitions and Functions (cont’d)
Input (I)
Output (O)
O
O
N.C.
N.C.
N.C.
N.C.
I
O
I
I
O
I
Description
Pulse density modulated output
Of the second-order sigma-delta ADC of line port 2
Pulse density modulated output
Of the second-order sigma-delta ADC of line port 3
For future use, leave pin open
For future use, leave pin open
For future use, leave pin open
For future use, leave pin open
Serial Data Transmit
Interface for the Transmit and Control Data. Up to
eight
Transmission and sampling is based on clock CL15
(15.36 MBit/s).
Serial Data Receive
Level information for the detection of the awake
tone. The four lines are multiplexed on SDR.
Select 2B1Q or 4B3T Code
Code = low sets 2B1Q Code.
Reset
Reset and power down of the entire AFE-X including
PLL and all four line ports. Asynchronous signal,
active low.
Note: While RES=low, the PLL is not reset statically,
Crystal Out
15.36 MHz crystal is connected. Leave open if not
used.
Crystal In
A synchronous 15.36 MHz clock signal or
15.36 MHz crystal is connected. Clamping XIN to
either low or high sets CL15 to Input.
1)
but only during the fallig edge at pin RES.
lines can be multiplexed on SDX.
17
External Signals
Rev. 1, 2004-05-28
PEB 24902
PEF 24902