PEF24902HV21XP Lantiq, PEF24902HV21XP Datasheet - Page 16

• Manufacturer Part Number: PEF24902HV21XP
• Manufacturer: Lantiq

Specifications of PEF24902HV21XP

• Number Of Line Interfaces: 1
• Lead Free Status / Rohs Status: Compliant

Table 3
Pin No. Symbol
16
13
52
53
47
44
61
60
2
5
Digital Interface
7
38
39
Data Sheet
AOUT1
BOUT1
AIN2
BIN2
AOUT2
BOUT2
AIN3
BIN3
AOUT3
BOUT3
CL15
PDM0
PDM1
Pin Definitions and Functions (cont’d)
Input (I)
Output (O)
O
O
I
I
O
O
I
I
O
O
I/O
O
O
Description
Differential U interface output
Line port 1
Differential U interface output
Line port 1
Differential U interface input
Line port 2
Differential U interface input
Line port 2
Differential U interface output
Line port 2
Differential U interface output
Line port 2
Differential U interface input
Line port 3
Differential U interface input
Line port 3
Differential U interface output
Line port 3
Differential U interface output
Line port 3
Master Clock 15.36 MHz
All operations and the data exchange on the digital
interface are based on this clock. CL 15 is set to an
input at power-on. If a 15.36 MHz clock is generated
by the internal PLL/oscillator or if an external clock is
provided at XIN then CL15 becomes an output and
issues this clock. If the pin XIN is clamped to low or
high then CL15 remains an input and an other
device has to provide the 15.36 MHz clock.
Pulse density modulated output
Of the second-order sigma-delta ADC of line port 0
Pulse density modulated output
Of the second-order sigma-delta ADC of line port 1
16
External Signals
Rev. 1, 2004-05-28
PEB 24902
PEF 24902