PAC-POWR1220AT8-HS-EVN Lattice, PAC-POWR1220AT8-HS-EVN Datasheet - Page 42

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PAC-POWR1220AT8-HS-EVN

Manufacturer Part Number
PAC-POWR1220AT8-HS-EVN
Description
Supervisory Circuits Pwr Mgr Hercules Std Development Kit
Manufacturer
Lattice
Series
ispPAC®, MachXO, Herculesr

Specifications of PAC-POWR1220AT8-HS-EVN

Silicon Manufacturer
Lattice Semiconductor
Kit Application Type
Power Management
Application Sub Type
Power Manager
Kit Contents
Preloaded Board, Eval Board, AC Adapter, USB Connector Cable
Rohs Compliant
Yes
Main Purpose
Power Management, ORing Controller / Hot Swap Controller
Embedded
Yes, Other
Utilized Ic / Part
ispPAC-POWR1220AT8, LCMXO2280
Primary Attributes
-
Secondary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Lattice Semiconductor
Programming ispPAC-POWR1220AT8: Alternate Method
Some applications require that the ispPAC-POWR1220AT8 be programmed before turning the power on to the
entire circuit board. To meet such application needs, the ispPAC-POWR1220AT8 provides an alternate program-
ming method which enables the programming of the ispPAC-POWR1220AT8 device through the JTAG chain with a
separate power supply applied just to the programming section of the ispPAC-POWR1220AT8 device with the main
power supply of the board turned off.
Three special purpose pins, VCCPROG, ATDI and TDISEL, enable programming of the un-programmed ispPAC-
POWR1220AT8 under such circumstances. The VCCPROG pin provides power to the programming circuitry of the
ispPAC-POWR1220AT8 device (when VCCD and VCCA are unpowered). The VCCJ pin must be powered to
enable the JTAG port. The ATDI pin provides an alternate connection to the JTAG header while bypassing all the
un-powered devices in the JTAG chain. TDISEL pin enables switching between the ATDI and the standard JTAG
signal TDI. When the internally pulled-up TDISEL = 1, standard TDI pin is enabled and when the TDISEL = 0, ATDI
is enabled.
In order to use this feature the JTAG signals of the ispPAC-POWR1220AT8 are connected to the header as shown
in Figure 1-34. Note: The ispPAC-POWR1220AT8 should be the last device in the JTAG chain.
After programming, the VCCPROG pin MUST be left floating when the VCCD and VCCA pins are powered.
Figure 1-34. ispPAC-POWR1220AT8 Alternate TDI Configuration Diagram
Alternate TDI Selection Via JTAG Command
When the TDISEL pin held high and four consecutive IDCODE instructions are issued, ispPAC-POWR1220AT8
responds by making its active JTAG data input the ATDI pin. When ATDI is selected, data on its TDI pin is ignored
until the JTAG state machine returns to the Test-Logic-Reset state.
This method of selecting ATDI takes advantage of the fact that a JTAG device with an IDCODE register will auto-
matically load its unique IDCODE instruction into the Instruction Register after a Test-Logic-Reset. This JTAG
capability permits blind interrogation of devices so that their location in a serial chain can be identified without hav-
ing to know anything about them in advance. A blind interrogation can be made using only the TMS and TCLK con-
trol pins, which means TDI and TDO are not required for performing the operation. Figure 1-35 illustrates the logic
for selecting whether the TDI or ATDI pin is the active data input to ispPAC-POWR1220AT8.
VCCPROG
TDISEL
TMS
TDO
TCK
TDI
JTAG Signal
Connector
VCCPROG for programming ispPAC-POWR1220AT8 through ATDI (VCC should be off)
TDI
Other JTAG
Device(s)
VCCJ
1-42
TDO
only after confirming
Apply power to VCC
VCCPROG supply
is disconnected.
ATDI
TDI
ispPAC-POWR1220AT8 Data Sheet
ispPAC-POWR
1220AT8
VCCPROG
TDO

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