PIC16F726-I/SP Microchip Technology Inc., PIC16F726-I/SP Datasheet - Page 42
PIC16F726-I/SP
Manufacturer Part Number
PIC16F726-I/SP
Description
28 PIN, 14 KB FLASH, 1.8V-5.5V, 16 MHZ INT. OSC.
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F726-ISP.pdf
(266 pages)
Specifications of PIC16F726-I/SP
A/d Inputs
11-Channel, 8-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Frequency
20 MHz
Input Output
25
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
14K Bytes
Ram Size
368 Bytes
Resistance, Drain To Source On
Bytes
Serial Interface
I2C, SPI, AUSART
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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PIC16F72X/PIC16LF72X
TABLE 3-5:
TABLE 3-6:
DS41341B-page 40
STATUS
PCON
Legend:
Note 1:
Power-on Reset
MCLR Reset during normal operation
MCLR Reset during Sleep
WDT Reset
WDT Wake-up
Brown-out Reset
Interrupt Wake-up from Sleep
Legend: u = unchanged, x = unknown,
Note 1:
Name
u = unchanged, x = unknown,
used by Resets.
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
When the wake-up is due to an interrupt and Global Interrupt Enable bit, GIE, is set, the PC is loaded with
the interrupt vector (0004h) after execution of PC + 1.
Bit 7
IRP
—
Condition
INITIALIZATION CONDITION FOR SPECIAL REGISTERS
SUMMARY OF REGISTERS ASSOCIATED WITH RESETS
Bit 6
RP1
—
Bit 5
RP0
—
-
= unimplemented bit, reads as ‘0’, q = value depends on condition. Shaded cells are not
-
Bit 4
TO
—
= unimplemented bit, reads as ‘0’.
Preliminary
Program
PC + 1
Counter
PC + 1
Bit 3
0000h
0000h
0000h
0000h
0000h
PD
—
(1)
Bit 2
—
Z
Bit 1
POR
DC
0001 1xxx
000u uuuu
0001 0uuu
0000 uuuu
uuu0 0uuu
0001 1xxx
uuu1 0uuu
Register
STATUS
Bit 0
BOR
C
© 2008 Microchip Technology Inc.
0001 1xxx
---- --qq
POR, BOR
Value on
---- --0x
---- --uu
---- --uu
---- --uu
---- --uu
---- --10
---- --uu
Register
PCON
000q quuu
---- --uu
Resets
Value on
all other
(1)
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