PIC16F726-I/SP Microchip Technology Inc., PIC16F726-I/SP Datasheet - Page 189

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PIC16F726-I/SP

Manufacturer Part Number
PIC16F726-I/SP
Description
28 PIN, 14 KB FLASH, 1.8V-5.5V, 16 MHZ INT. OSC.
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F726-I/SP

A/d Inputs
11-Channel, 8-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Frequency
20 MHz
Input Output
25
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
14K Bytes
Ram Size
368 Bytes
Resistance, Drain To Source On
Bytes
Serial Interface
I2C, SPI, AUSART
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
18.0
The Flash program memory is readable during normal
operation over the full V
data from Program Memory, five Special Function
Registers (SFRs) are used:
• PMCON1
• PMDATL
• PMDATH
• PMADRL
• PMADRH
EXAMPLE 18-1:
© 2008 Microchip Technology Inc.
PROGRAM MEMORY READ
BANKSEL PMADRL
MOVF
MOVWF
MOVF
MOVWF
BANKSEL PMCON1
BSF
NOP
NOP
BANKSEL PMDATL
MOVF
MOVWF
MOVF
MOVWF
PROGRAM MEMORY READ
MS_PROG_ADDR, W ;
PMADRH
LS_PROG_ADDR, W ;
PMADRL
PMCON1, RD
PMDATL, W
LOWPMBYTE
PMDATH, W
HIGHPMBYTE
DD
range of the device. To read
;
;MS Byte of Program Address to read
;LS Byte of Program Address to read
;
;Initiate Read
;Any instructions here are ignored as program
;memory is read in second cycle after BSF
;
;W = LS Byte of Program Memory Read
;
;W = MS Byte of Program Memory Read
;
Preliminary
PIC16F72X/PIC16LF72X
The value written to the PMADRH:PMADRL register
pair determines which program memory location is
read. The read operation will be initiated by setting the
RD bit of the PMCON1 register. The program memory
flash controller takes two instructions to complete the
read, causing the second instruction after the setting
the RD bit will be ignored. To avoid conflict with pro-
gram execution, it is recommended that the two instruc-
tions following the setting of the RD bit are NOP. When
the read completes, the result is placed in the
PMDATLH:PMDATL
Example 18-1 for sample code.
Note:
Code-protect does not effect the CPU
from performing a read operation on the
program memory. For more information,
refer to Section 8.2 “Code Protection”
register
pair.
DS41341B-page 187
Refer
to

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