PIC16F726-I/SP Microchip Technology Inc., PIC16F726-I/SP Datasheet - Page 137

• Manufacturer Part Number: PIC16F726-I/SP
• Description: 28 PIN, 14 KB FLASH, 1.8V-5.5V, 16 MHZ INT. OSC.
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F726-I/SP

• A/d Inputs: 11-Channel, 8-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Frequency: 20 MHz
• Input Output: 25
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 14K Bytes
• Ram Size: 368 Bytes
• Resistance, Drain To Source On: Bytes
• Serial Interface: I2C, SPI, AUSART
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

15.1
In Capture mode, CCPRxH:CCPRxL captures the
16-bit value of the TMR1 register when an event occurs
on pin CCPx. An event is defined as one of the
following and is configured by the CCPxM<3:0> bits of
the CCPxCON register:
• Every falling edge
• Every rising edge
• Every 4th rising edge
• Every 16th rising edge
When a capture is made, the Interrupt Request Flag bit
CCPxIF of the PIRx register is set. The interrupt flag
must be cleared in software. If another capture occurs
before the value in the CCPRxH, CCPRxL register pair
is read, the old captured value is overwritten by the new
captured value (refer to Figure 15-1).
15.1.1
In Capture mode, the CCPx pin should be configured
as an input by setting the associated TRIS control bit.
Either RC1 or RB3 can be selected as the CCP2 pin.
Refer to Section 6.1 “Alternate Pin Function” for
more information.
FIGURE 15-1:
15.1.2
Timer1 must be running in Timer mode or Synchronized
Counter mode for the CCP module to use the capture
feature. In Asynchronous Counter mode or when
Timer1 is clocked at F
not work.
© 2008 Microchip Technology Inc.
CCPx
Note:
System Clock (F
Capture Mode
Edge Detect
TIMER1 MODE SELECTION
CCPx PIN CONFIGURATION
If the CCPx pin is configured as an output,
a write to the port can cause a capture
condition.
Prescaler
÷ 1, 4, 16
and
CCPxCON<3:0>
OSC
)
Set Flag bit CCPxIF
(PIRx register)
OSC
CAPTURE MODE
OPERATION BLOCK
DIAGRAM
, the capture operation may
Capture
Enable
CCPRxH
TMR1H
CCPRxL
TMR1L
Preliminary
PIC16F72X/PIC16LF72X
15.1.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCPxIE interrupt enable bit of the PIEx register clear to
avoid false interrupts. Additionally, the user should
clear the CCPxIF interrupt flag bit of the PIRx register
following any change in operating mode.
15.1.4
There are four prescaler settings specified by the
CCPxM<3:0> bits of the CCPxCON register. Whenever
the CCP module is turned off, or the CCP module is not
in Capture mode, the prescaler counter is cleared. Any
Reset will clear the prescaler counter.
Switching from one capture prescaler to another does not
clear the prescaler and may generate a false interrupt. To
avoid this unexpected operation, turn the module off by
clearing the CCPxCON register before changing the
prescaler (refer to Example 15-1).
EXAMPLE 15-1:
15.1.5
Capture mode depends upon the Timer1 module for
proper operation. There are two options for driving the
Timer1 module in Capture mode. It can be driven by the
instruction clock (F
source.
If Timer1 is clocked by F
increment during Sleep. When the device wakes from
Sleep, Timer1 will continue from its previous state.
If Timer1 is clocked by an external clock source, then
Capture mode will operate as defined in Section 15.1
“Capture Mode”.
BANKSEL CCP1CON
CLRF
MOVLW
MOVWF
Note:
CCP1CON
NEW_CAPT_PS ;Load the W reg with
CCP1CON
SOFTWARE INTERRUPT
Clocking Timer1 from the system clock
(F
Mode. In order for Capture Mode to
recognize the trigger event on the CCPx
pin, Timer1 must be clocked from the
Instruction Clock (F
external clock source.
CCP PRESCALER
CAPTURE DURING SLEEP
OSC
) should not be used in Capture
OSC
CHANGING BETWEEN
CAPTURE PRESCALERS
;Set Bank bits to point
;to CCP1CON
;Turn CCP module off
; the new prescaler
; move value and CCP ON
;Load CCP1CON with this
; value
/4), or by an external clock
OSC
/4, then Timer1 will not
OSC
DS41341B-page 135
/4) or from an