DS26521L+ Maxim Integrated Products, DS26521L+ Datasheet - Page 2

• Manufacturer Part Number: DS26521L+
• Description: IC TXRX T1/E1/J1 64-LQFP
• Manufacturer: Maxim Integrated Products
• Type: Line Interface Units (LIUs)r

Specifications of DS26521L+

• Number Of Drivers/receivers: 1/1
• Protocol: T1/E1/J1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Product: Framer
• Number Of Transceivers: 1
• Data Rate: 44.736 Mbps
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 3.135 V
• Supply Current (max): 220 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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8.9.1
8.9.2
8.9.3
8.9.4
8.9.5
8.9.6
8.9.7
DETAILED DESCRIPTION ...............................................................................................9
FEATURE HIGHLIGHTS ................................................................................................10
APPLICATIONS..............................................................................................................13
SPECIFICATIONS COMPLIANCE .................................................................................14
ACRONYMS AND GLOSSARY......................................................................................16
BLOCK DIAGRAMS .......................................................................................................17
PIN DESCRIPTIONS ......................................................................................................19
FUNCTIONAL DESCRIPTION........................................................................................25
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G
L
C
J
F
S
HDLC C
T
M
P
M
C
R
I
G
P
D
S
F
NITIALIZATION AND
ITTER
INE
RAMER
EST AND
RAMERS
YSTEM
IN
ORT
YSTEM
LOCK
LOCK
ESETS AND
EVICE
ENERAL
LOBAL
AJOR
ICROCONTROLLER
ICROPROCESSOR
S
LAVE
F
Parallel Port Mode................................................................................................................................ 25
SPI Serial Port Mode............................................................................................................................ 25
SPI Functional Timing Diagrams ......................................................................................................... 25
Backplane Clock Generation ............................................................................................................... 28
Example Device Initialization Sequence .............................................................................................. 30
Elastic Stores ....................................................................................................................................... 32
IBO Multiplexer..................................................................................................................................... 35
H.100 (CT Bus) Compatibility .............................................................................................................. 36
Receive and Transmit Channel Blocking Registers............................................................................. 37
Transmit Fractional Support (Gapped Clock Mode) ............................................................................ 37
Receive Fractional Support (Gapped Clock Mode) ............................................................................. 37
T1 Framing........................................................................................................................................... 38
E1 Framing........................................................................................................................................... 41
T1 Transmit Synchronizer .................................................................................................................... 43
Signaling .............................................................................................................................................. 44
T1 Data Link......................................................................................................................................... 48
E1 Data Link......................................................................................................................................... 50
Maintenance and Alarms ..................................................................................................................... 51
I
UNCTIONAL
NTERFACE
R
A
S
S
O
ESOURCES
I
/F
R
I
ONTROLLERS
NTERRUPTS
B
TTENUATOR
YNTHESIZER
TRUCTURE
S
PERATING
NTERFACE
......................................................................................................................................10
......................................................................................................................................38
ESOURCES
D
ACKPLANE
ORMATTER
ERIAL
IAGNOSTICS
P
OWER
............................................................................................................................10
P
D
ERIPHERAL
ESCRIPTION
........................................................................................................................30
C
I
.......................................................................................................................28
M
NTERFACE
......................................................................................................................11
P
-D
.....................................................................................................................10
.....................................................................................................................30
ONFIGURATION
I
....................................................................................................................10
....................................................................................................................10
....................................................................................................................30
NTERFACE
ODES
ARALLEL
...................................................................................................................12
OWN
................................................................................................................12
.............................................................................................................9
M
I
ODES
NTERFACE
......................................................................................................19
......................................................................................................25
TABLE OF CONTENTS
P
ORT
...................................................................................................32
..............................................................................................29
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.............................................................................................12
(SPI) F
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EATURES
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DS26521 Single T1/E1/J1 Transceiver