DSPIC30F5015-30I/PT Microchip Technology Inc., DSPIC30F5015-30I/PT Datasheet - Page 29
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DSPIC30F5015-30I/PT
Manufacturer Part Number
DSPIC30F5015-30I/PT
Description
DSP, 16-Bit, 66 KB Flash, 2KB RAM, 52 I/O, TQFP-64
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC30F5015-30IPT.pdf
(230 pages)
Specifications of DSPIC30F5015-30I/PT
A/d Inputs
16-Channels, 10-Bit
Cpu Speed
30 MIPS
Eeprom Memory
1K Bytes
Input Output
52
Interface
CAN, I2C, SPI, UART/USART
Ios
52
Memory Type
Flash
Number Of Bits
16
Package Type
64-pin TQFP
Programmable Memory
66K Bytes
Ram Size
2K Bytes
Timers
5-16-bit, 2-32-bit
Voltage, Range
2.5-5.5
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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FIGURE 3-5:
3.2
The core has two data spaces. The data spaces can be
considered either separate (for some DSP instruc-
tions), or as one unified linear address range (for MCU
instructions). The data spaces are accessed using two
Address Generation Units (AGUs) and separate data
paths.
3.2.1
The data space memory is split into two blocks, X and
Y data space. A key element of this architecture is that
Y space is a subset of X space, and is fully contained
within X space. In order to provide an apparent linear
addressing space, X and Y spaces have contiguous
addresses.
© 2007 Microchip Technology Inc.
BSET
MOV
MOV
MOV
Space
Note: PSVPAG is an 8-bit register, containing bits <22:15> of the program space address
Data
EA
Upper Half of Data
Space is Mapped
into Program Space
(i.e., it defines the page in program space to which the upper half of data space is being mapped).
Data Address Space
CORCON,#2
#0x00, W0
W0, PSVPAG
0x9200, W0
DATA SPACE MEMORY MAP
16
EA<15> = 0
EA<15> = 1
DATA SPACE WINDOW INTO PROGRAM SPACE OPERATION
15
15
; PSV bit set
; Set PSVPAG register
; Access program memory location
; using a data space access
Data Space
0x8000
15
0x0000
0xFFFF
Address
Concatenation
PSVPAG
0x00
When executing any instruction other than one of the
MAC class of instructions, the X block consists of the
64 Kbyte data address space (including all Y
addresses). When executing one of the MAC class of
instructions, the X block consists of the 64 Kbyte data
address space excluding the Y address block (for data
reads only). In other words, all other instructions
regard the entire data memory as one composite
address space. The MAC class instructions extract the
Y address space from data space and address it using
EAs sourced from W10 and W11. The remaining X
data space is addressed using W8 and W9. Both
address spaces are concurrently accessed only with
the MAC class instructions.
A data space memory map is shown in Figure 3-6.
Figure 3-7 shows a graphical summary of how X and Y
data spaces are accessed for MCU and DSP
instructions.
8
dsPIC30F5015/5016
(1)
23
23
Program Space
15
Data Read
DS70149C-page 27
0
0x000100
0x017FFE
0x001200
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