DS2154L+ Maxim Integrated Products, DS2154L+ Datasheet - Page 64

• Manufacturer Part Number: DS2154L+
• Description: IC TXRX E1 1CHIP 5V ENH 100-LQFP
• Manufacturer: Maxim Integrated Products
• Type: Transceiverr

Specifications of DS2154L+

• Number Of Drivers/receivers: 1/1
• Protocol: E1
• Voltage - Supply: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Product: Framer
• Number Of Transceivers: 1
• Data Rate: 1.544 Mbps
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 4.75 V
• Supply Current (max): 75 mA (Typ)
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Ic Interface Type: Parallel, Serial
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 100
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.1 Receive Clock and Data Recovery
The DS2154 contains a digital clock recovery system. See
The DS2154 couples to the receive E1 shielded twisted pair or coax via a 1:1 transformer. See
for transformer details. The 2.048MHz clock attached at the MCLK pin is internally multiplied by 16 via
an internal PLL and fed to the clock recovery system. The clock recovery system uses the clock from the
PLL circuit to form a 16 times oversampler, which is used to recover the clock and data. This
oversampling technique offers outstanding jitter tolerance (see
Normally, the clock that is output at the RCLKO pin is the recovered clock from the E1 AMI/B8ZS
waveform presented at the RTIP and RRING inputs. When no AMI signal is present at RTIP and RRING,
a Receive Carrier Loss (LRCL) condition will occur and the RCLKO will be sourced from the clock
applied at the MCLK pin. If the jitter attenuator is either placed in the transmit path or is disabled, the
RCLKO output can exhibit slightly shorter high cycles of the clock. This is due to the highly over-
sampled digital clock recovery circuitry. If the jitter attenuator is placed in the receive path (as is the case
in most applications), the jitter attenuator restores the RCLK to being close to 50% duty cycle. See the
Receive AC Timing Characteristics in Section
13.2 Transmit Waveshaping and Line Driving
The DS2154 uses a set of laser-trimmed delay lines along with a precision Digital-to-Analog Converter
(DAC) to create the waveforms that are transmitted onto the E1 line. The waveforms created by the
DS2154 meet the ITU G.703 specifications. See
be generated by properly programming the L2/L1/L0 bits in the Line Interface Control Register (LICR).
The DS2154 can set up in a number of various configurations depending on the application. See
Table 13-1
Table 13-1. Line Build-Out Select in LICR
N.M. = not meaningful
Note: This LBO is not recommended for use in the DS2154 A2 revision.
Due to the nature of the design of the transmitter in the DS2154, very little jitter (less than 0.005UI
broadband from 10Hz to 100kHz) is added to the jitter present on TCLKI. Also, the waveforms that they
create are independent of the duty cycle of TCLK. The transmitter in the DS2154 couples to the E1
transmit shielded twisted pair or coax via a 1:1.15 or 1:1.36 step-up transformer as shown in
For the devices to create the proper waveforms, this transformer used must meet the specifications listed
LLL
210
000
001
010
011
100
110
100
and
75Ω normal (See Note 1)
120Ω normal
75Ω with protection resistors
120Ω with protection resistors
75Ω with high return loss
75Ω with high return loss
120Ω with high return loss
Figure
APPLICATION
13-1.
16
64 of 87
TRANSFORMER
Figure
for more details.
1:1.15 step-up
1:1.15 step-up
1:1.15 step-up
1:1.15 step-up
1:1.15 step-up
1:1.36 step-up
1:1.36 step-up
13-3. The user will select which waveform is to
Figure 1-1
Figure
13-2).
and
RETURN
LOSS
N.M.
N.M.
N.M.
N.M.
(dB)
Figure 13-1
21
21
21
(SEE
for more details.
R
Figure
T
8.2
8.2
Figure
27
18
27
0
0
(Ω)
Table 13-2
13-1)
13-1.
P-P