PIC18F8520-I/PT Microchip Technology Inc., PIC18F8520-I/PT Datasheet - Page 225

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PIC18F8520-I/PT

Manufacturer Part Number
PIC18F8520-I/PT
Description
80 PIN, 32 KB FLASH, 2048 RAM, 68 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F8520-I/PT

A/d Inputs
16-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
1024 Bytes
Input Output
68
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
80-pin TQFP
Programmable Memory
32K Bytes
Ram Size
2K Bytes
Speed
40 MHz
Timers
2-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part

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20.0
The comparator module contains two analog compara-
tors. The inputs to the comparators are multiplexed
with the RF1 through RF6 pins. The on-chip voltage ref-
erence (Section 21.0 “Comparator Voltage Reference
Module”) can also be an input to the comparators.
REGISTER 20-1:
 2004 Microchip Technology Inc.
COMPARATOR MODULE
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
PIC18F6520/8520/6620/8620/6720/8720
CMCON REGISTER
C2OUT: Comparator 2 Output bit
When C2INV = 0:
1 = C2 V
0 = C2 V
When C2INV = 1:
1 = C2 V
0 = C2 V
C1OUT: Comparator 1 Output bit
When C1INV = 0:
1 = C1 V
0 = C1 V
When C1INV = 1:
1 = C1 V
0 = C1 V
C2INV: Comparator 2 Output Inversion bit
1 = C2 output inverted
0 = C2 output not inverted
C1INV: Comparator 1 Output Inversion bit
1 = C1 output inverted
0 = C1 output not inverted
CIS: Comparator Input Switch bit
When CM2:CM0 = 110:
1 = C1 V
0 = C1 V
CM2:CM0: Comparator Mode bits
Figure 20-1 shows the Comparator modes and the CM2:CM0 bit settings.
Legend:
R = Readable bit
- n = Value at POR
bit 7
C2OUT
R-0
C2 V
C2 V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
+ > C2 V
+ < C2 V
+ < C2 V
+ > C2 V
+ > C1 V
+ < C1 V
+ < C1 V
+ > C1 V
- connects to RF5/AN10
- connects to RF3/AN8
- connects to RF6/AN11
- connects to RF4/AN9
C1OUT
R-0
IN
IN
IN
IN
IN
IN
IN
IN
-
-
-
-
-
-
-
-
C2INV
R/W-0
W = Writable bit
‘1’ = Bit is set
C1INV
R/W-0
The CMCON register, shown as Register 20-1, con-
trols the comparator input and output multiplexers. A
block diagram of the various comparator configurations
is shown in Figure 20-1.
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CIS
R/W-0
CM2
x = Bit is unknown
R/W-0
CM1
DS39609B-page 223
R/W-0
CM0
bit 0

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