DSPIC30F3011-30I/PT Microchip Technology Inc., DSPIC30F3011-30I/PT Datasheet - Page 33

• Manufacturer Part Number: DSPIC30F3011-30I/PT
• Description: 16 BIT MCU/DSP 44LD 30MIPS 24 KB FLASH
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F3011-30I/PT

• A/d Inputs: 9-Channels, 10-Bit
• Cpu Speed: 30 MIPS
• Eeprom Memory: 1K Bytes
• Input Output: 30
• Interface: I2C/SPI/UART, USART
• Ios: 30
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 44-pin TQFP
• Programmable Memory: 24K Bytes
• Ram Size: 1K Bytes
• Timers: 5-16-bit, 2-32-bit
• Voltage, Range: 2.5-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

3.0
3.1
The program address space is 4M instruction words. It
is addressable by a 24-bit value from either the 23-bit
PC, table instruction EA, or data space EA, when pro-
gram space is mapped into data space, as defined by
Table 3-1. Note that the program space address is
incremented by two between successive program
words, in order to provide compatibility with data space
addressing.
TABLE 3-1:
FIGURE 3-1:
 2004 Microchip Technology Inc.
Instruction Access
TBLRD/TBLWT
TBLRD/TBLWT
Program Space Visibility
Note: This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the dsPIC30F Family Reference
Manual (DS70046). For more information on the device
instruction set and programming, refer to the dsPIC30F
Programmer’s Reference Manual (DS70030).
Access Type
MEMORY ORGANIZATION
Program Address Space
PROGRAM SPACE ADDRESS CONSTRUCTION
Note: Program Space Visibility cannot be used to access bits <23:16> of a word in program memory.
Using
Program
Counter
Using
Program
Space
Visibility
Using
Table
Instruction
DATA ACCESS FROM PROGRAM SPACE ADDRESS GENERATION
User
User
(TBLPAG<7> = 0)
Configuration
(TBLPAG<7> = 1)
User
Space
Select
User/
Configuration
1/0
0
0
Access
Space
PSVPAG Reg
TBLPAG Reg
8 bits
8 bits
Select
Preliminary
<23>
Program Counter
0
0
TBLPAG<7:0>
TBLPAG<7:0>
24-bit EA
23 bits
1
User program space access is restricted to the lower
4M instruction word address range (0x000000 to
0x7FFFFE), for all accesses other than TBLRD/TBLWT,
which use TBLPAG<7> to determine user or configura-
tion space access. In Table 3-1, Read/Write instruc-
tions, bit 23 allows access to the Device ID, the User ID
and the configuration bits. Otherwise, bit 23 is always
clear.
Note:
<22:16>
PSVPAG<7:0>
15 bits
16 bits
Program Space Address
EA
EA
The address map shown in Figure 3-5 is
conceptual, and the actual memory con-
figuration may vary across individual
devices depending on available memory.
PC<22:1>
<15>
Select
Byte
0
Data EA <15:0>
Data EA <15:0>
dsPIC30F
<14:1>
Data EA <14:0>
DS70082G-page 31
<0>
0