CYP15G0101DXB-BBXC Cypress Semiconductor Corp, CYP15G0101DXB-BBXC Datasheet - Page 2

• Manufacturer Part Number: CYP15G0101DXB-BBXC
• Description: IC TXRX HOTLINK 100-LBGA
• Manufacturer: Cypress Semiconductor Corp
• Series: HOTlink II™r
• Type: Transceiverr

Specifications of CYP15G0101DXB-BBXC

• Package / Case: 100-LBGA
• Protocol: Fibre Channel
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Product: PHY
• Data Rate: 1500 MBd
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 3.135 V
• Supply Current: 0.5 A
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CYP15G0101DX-EVAL - EVAL BRD FOR HOTLINK II
• Number Of Drivers/receivers: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2920; CYP15G0101DXB-BBXC

The CYW15G0101DXB
which includes operation at the OBSAI RP3 datarate of both
1536 MBaud and 768 MBaud.
The CYV15G0101DXB satisfies the SMPTE 259M and SMPTE
292M compliance as per the EG34-1999 pathological test
requirements.
CYP(V)(W)15G0101DXB single-channel HOTLink II consists of
a byte-wide channel. The channel can accept either eight-bit
data characters or pre-encoded 10-bit transmission characters.
Data characters are passed from the transmit input register to an
embedded 8B/10B encoder to improve their serial transmission
characteristics. These encoded characters are then serialized
and output from dual positive ECL (PECL)-compatible
differential transmission-line drivers at a bit-rate of either 10 or
20 times the input reference clock.
The receive (RX) section of the CYP(V)(W)15G0101DXB
single-channel HOTLink II consists of a byte-wide channel. The
channel accepts a serial bit-stream from one of two
PECL-compatible differential line receivers and, using a
completely integrated PLL clock synchronizer, recovers the
timing information necessary for data reconstruction. The
recovered bit-stream is deserialized and framed into characters,
8B/10B decoded, and checked for transmission errors.
Recovered decoded characters are then written to an internal
elasticity buffer, and presented to the destination host system.
The integrated 8B/10B encoder/decoder may be bypassed for
systems that present externally encoded or scrambled data at
the parallel interface.
Document Number: 38-02031 Rev. *L
Transceiver Logic Block Diagram
Note
2. CYV15G0101DXB refers to SMPTE 259M and SMPTE 292M compliant devices. CYW15G0101DXB refers to OBSAI RP3 compliant devices (maximum operating
data rate is 1540 MBaud). CYP15G0101DXB refers to devices not compliant to SMPTE 259M and SMPTE 292M pathological test requirements and also OBSAI
RP3 operating datarate of 1536 MBaud. CYP(V)(W)15G0101DXB refers to all three devices.
The
[2]
transmit
operates from 195 to 1540 MBaud,
(TX)
section
Encoder
8B/10B
Serializer
Phase
Buffer
Align
x10
TX
of
the
Deserializer
Elasticity
Decoder
8B/10B
Buffer
Framer
RX
x11
The parallel I/O interface may be configured for numerous forms
of clocking to provide the highest flexibility in system
architecture. In addition to clocking the transmit path interfaces
from one or multiple sources, the receive interface may be
configured to present data relative to a recovered clock or to a
local reference clock.
The transmit and the receive channels contain BIST pattern
generators and checkers, respectively. This BIST hardware
allows at-speed testing of the high-speed serial data paths in
both transmit and receive sections, as well as across the
interconnecting links.
HOTLink II devices are ideal for a variety of applications where
parallel
point-to-point
interconnecting backplanes on switches, routers, base-stations,
servers and video transmission systems.
The CYV15G0101DXB is verified by testing to be compliant to
all the pathological test patterns documented in SMPTE
EG34-1999, for both the SMPTE 259M and 292M signaling
rates. The tests ensure that the receiver recovers data with no
errors for the following patterns:
1. Repetitions of 20 ones and 20 zeros.
2. Single burst of 44 ones or 44 zeros.
3. Repetitions of 19 ones followed by 1 zero or 19 zeros followed
by 1 one.
interfaces
serial
can
links.
be
Some
CYW15G0101DXB
replaced
CYP15G0101DXB
CYV15G0101DXB
applications
with
Page 2 of 44
high-speed,
include
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