CS8952-IQZ Cirrus Logic Inc, CS8952-IQZ Datasheet - Page 22

• Manufacturer Part Number: CS8952-IQZ
• Description: IC TXRX 100/10 PHY 100TQFP
• Manufacturer: Cirrus Logic Inc
• Type: Transceiverr

Specifications of CS8952-IQZ

• Package / Case: 100-TQFP, 100-VQFP
• Protocol: MII
• Voltage - Supply: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Transceivers
• Number Of Transceivers: 1
• Standard Supported: 100BASE-FX or 100BASE-TX or 10BASE-T
• Data Rate: 10 Mbps or 100 Mbps
• Supply Voltage (max): 6 V
• Supply Voltage (min): - 0.3 V
• Supply Current (max): +/- 10 mA
• Maximum Operating Temperature: + 70 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1208

3.1.1.2
One of two internal 100BASE-TX loopback modes
can be selected. Local loopback redirects the
TXD[3:0] input data to RXD[3:0] data outputs
through the 4B5B coders and scramblers. Local
loopback is selected by asserting pin LPBK, by set-
ting the LPBK bit (bit 14) in the Basic Mode Con-
trol Register (address 00h) or by setting bits 8 and
11 in the Loopback, Bypass, and Receiver Error
Mask Register (address 18h) as shown in Table 4.
Remote loopback redirects the analog line interface
inputs to the analog line driver outputs. Remote
loopback is selected by setting bit 9 in the Loop-
back, Bypass, and Receiver Error Mask Register
(address 18h) as shown in Table 4.
When changing between local and non-loopback
modes, the data on RXD[3:0] will be undefined for
approximately 330 µs.
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver
DS206F1
Loopback
Remote
(bit 9)
Name
0
0
1
1
V6
V7
V8
V9
1. CONTROL code groups become violations when found in the data portion of the frame.
2. Invalid code groups are mapped to 5h unless the Code Error Report select bit in the Loopback,
100 Mb/s Loopback
Loopback
Bypass, and Receiver Error Mask Register (address 18h) is set, in which case invalid code groups are
mapped to 6h.
(bit 8)
PMD
0
1
0
1
5-bit Symbol
01000
10000
01100
11001
Table 4.
No Loopback
Local Loopback (toward MII)
Remote Loopback (toward line)
Operation is undefined
0110 or 0101 (Note 2)
0110 or 0101 (Note 2)
0110 or 0101 (Note 2)
0110 or 0101 (Note 2)
Code Violations (RX_ER = 1 or TX_ER = 1)
Normal Mode 4-bit
Function
Table 3. 4B5B Code Violation Decoding
Nibble
Error Report
3.1.2
The CS8952 provides two low latency modes for
repeater applications. These are selected by assert-
ing either pin BPALIGN or BP4B5B. Both pins
have the effect of bypassing the 4B5B encoder and
decoder. Bypassing the coders decreases latency,
and uses a 5-bit wide parallel code group interface
on pins RXD[4:0] and TXD[4:0] instead of the 4-
bit wide MII nibble interface on pins RXD[3:0] and
TXD[3:0]. In repeater mode, pin RX_ER is rede-
fined as the fifth receive data bit (RXD4), and pin
TX_ER is redefined as the fifth transmit data bit
(TXD4).
BPALIGN can also be selected by setting bit 12 in
Loopback, Bypass, and Receiver Error Mask Reg-
ister (address 18h). BP4B5B can be selected by set-
ting bit 14 of the same register.
Pin BPALIGN causes more of the CS8952 to be
bypassed than the BP4B5B pin. BPALIGN also by-
passes the scrambler/descrambler, and the NRZI to
NRZ converters (see Figure 1). Also, for repeater
applications, pin REPEATER should be asserted to
redefine the function of the CRS (carrier sense) pin.
The REPEATER function may also be invoked by
setting bit 12 in the PCS Sublayer Configuration
Register (address 17h).
For repeater applications, the RX_EN pin can be
used to gate the receive data pins (RXD[4:0],
Mode 4-bit
Nibble
1100
1101
1110
1111
100BASE-X Repeater Application
Comments
CS8952
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