DP83256VF National Semiconductor, DP83256VF Datasheet - Page 86

• Manufacturer Part Number: DP83256VF
• Description: IC FDDI LAYER CTRLR 160PQFP
• Manufacturer: National Semiconductor
• Series: PLAYER+™r

Specifications of DP83256VF

• Controller Type: physical layer controller
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-BFQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -
• Interface: -
• Other names: *DP83256VF

D0 –D2
D3
D4 –D7
5 0 Registers
5 42 ALTERNATE PMD REGISTER (APMDREG)
This register is used to enable or disable the Alternate PMD inputs and ouputs These signals are not required for use in FDDI
board implementations that do not require a scrambler that is external to the PLAYER
the signal pairs RXC OUT RXD OUT RXC IN and RXD IN
The interface is disabled by default and should only be enabled if it is being used Note that Long Internal Loopback should not
be used when the Alternate PMD Interface is enabled
DO NOT WRITE TO RESERVED REGISTER BITS Writes to reserved register bits could prevent proper device operation
Therefore read the register first and then write it back with the non-reserved bits set to the desired value
Note The Alternate PMD Interface pins are only available on the 100-pin DP83256-AP and 160-pin DP83257 PLAYER
disabled on reset
ACCESS RULES
Bit
RES
D7
ADDRESS
RES
APMDEN
RES
3Ch
Symbol
RES
D6
RESERVED BITS DO NOT CHANGE THE VALUE OF THESE BITS Changes to reserved register bits could
prevent proper device operation
ALTERNATE PMD ENABLE When bit is set to 1 the Alternate PMD Interface is enabled When this bit is
reset to 0 the Alternate PMD Interface is disabled
The Alternate PMD Interface consists of the following extra ECL signal pairs
RXC OUT RXD OUT RXC IN and RXD IN
In some alternate PMD implementations it may also be necessary to use the 125 MHz Transmit Clock
signals (TXC) The TXC outputs must be separately enabled by the TXCE bit in the CGMREG register
Note The Alternate PMD Interface pins are only available on the 100-pin DP83256-AP and 160-pin DP83257 PLAYER
RESERVED BITS DO NOT CHANGE THE VALUE OF THESE BITS Changes to reserved register bits could
prevent proper device operation
(Continued)
Alternate PMD Interface is disabled on reset
Always
READ
RES
D5
RES
D4
WRITE
Always
APMDEN
D3
86
Description
RES
D2
a
RES
D1
device The actual interface consists of
a
devices The Alternate PMD Interface is
RES
D0
a
devices The