STE10/100A STMicroelectronics, STE10/100A Datasheet - Page 9

• Manufacturer Part Number: STE10/100A
• Description: IC CTRLR PCI ETHERNET 128-PQFP
• Manufacturer: STMicroelectronics

Specifications of STE10/100A

• Controller Type: Ethernet Controller, 10Base-T
• Interface: PCI
• Voltage - Supply: 3.14 V ~ 3.46 V
• Current - Supply: 130mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-3663

STE10/100A
Table 1.
Boot ROM/EEPROM interface
Pin no.
56~59
61~66
80~86
67~71
17
28
42
18
20
21
22
23
24
25
26
87
72
73
74
76
77
78
79
3
4
BrD5/EDO
Pin description (continued)
BrD7/ECK
DEVSEL#
BrA10~15
LED M2 -
BrD6/EDI
FRAME#
C-BEB3
C-BEB2
C-BEB1
C-BEB0
PERR#
SERR#
BrA0~3
BrA4~9
BrD0~4
STOP#
TRDY#
BrWE#
BrA16/
BrOE#
IDSEL
IRDY#
Fd/Col
BrCS#
Name
EECS
PAR
Type
O/D
O/O
O/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O/I
O
O
O
O
O
I
Bus command and byte enable
Initialization device select. This signal is asserted when the
host issues configuration cycles to the STE10/100A.
Asserted by PCI bus master during bus tenure
Master device is ready to begin data transaction
Target device is ready to begin data transaction
Device select. Indicates that a PCI target device address has
been decoded
PCI target device request to the PCI master to stop the
current transaction
Data parity error detected, driven by the device receiving
data
Address parity error
Parity. Even parity computed for AD[31:0] and C/BE[3:0];
master drives PAR for address and write data phase, target
drives PAR for read data phase.
ROM data bus
Provides up to 128Kbit EPROM or flash-ROM application
space.
This pin can be programmed as mode 2 LED display for full
duplex or collision status. It will be driven (LED on)
continually when a full duplex configuration is detected, or it
will be driven at a 20 Hz blinking frequency when a collision
status is detected in the half duplex configuration.
BootROM data bus (0~7)
EDO: Data output of serial EEPROM, data input to
STE10/100A
EDI: Data input to serial EEPROM, data output from
STE10/100A
ECK: Clock input to serial EEPROM, sourced by
STE10/100A
Chip select of serial EEPROM
BootROM chip select
BootROM read output enable for flash ROM application
BootROM write enable for flash ROM application.
Description
Pin description
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