DS31412N Maxim Integrated Products, DS31412N Datasheet - Page 28

IC 12CH DS3/3 FRAMER 349-BGA

DS31412N

Manufacturer Part Number
DS31412N
Description
IC 12CH DS3/3 FRAMER 349-BGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS31412N

Controller Type
DS3/E3 Framer
Interface
LIU
Voltage - Supply
3.135 V ~ 3.465 V
Current - Supply
960mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
349-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
DS31412N
Manufacturer:
Maxim Integrated
Quantity:
10 000
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
This register is a global resource and is mapped into address 06h in every framer in the device. In both interrupt-based and polling-based
device servicing strategies, the host processor should read this register and the ISR2 register first to determine which framers require servicing.
Bit 0: Interrupt 1 (INT1). This bit is set when framer 1 is driving the INT pin.
Bit 1: Interrupt 2 (INT2). This bit is set when framer 2 is driving the INT pin.
Bit 2: Interrupt 3 (INT3). This bit is set when framer 3 is driving the INT pin.
Bit 3: Interrupt 4 (INT4). This bit is set when framer 4 is driving the INT pin.
Bit 4: Interrupt 4 (INT5). This bit is set when framer 5 is driving the INT pin.
Bit 5: Interrupt 4 (INT6). This bit is set when framer 6 is driving the INT pin.
Bit 6: Interrupt 4 (INT7). This bit is set when framer 7 is driving the INT pin.
Bit 7: Interrupt 4 (INT8). This bit is set when framer 8 is driving the INT pin.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
This register is a global resource and is mapped into address 07h in every framer in the device. In both interrupt-
based and polling-based device servicing strategies, the host processor should read this register and the ISR1
register first to determine which framers require servicing.
Bit 0: Interrupt 9 (INT9). This bit is set when framer 9 is driving the INT pin.
Bit 1: Interrupt 10 (INT10). This bit is set when framer 10 is driving the INT pin.
Bit 2: Interrupt 11 (INT11). This bit is set when framer 11 is driving the INT pin.
Bit 3: Interrupt 12 (INT12). This bit is set when framer 12 is driving the INT pin.
INT8
N/A
7
7
INT7
N/A
6
6
ISR1
Interrupt Status Register 1
06h
ISR2
Interrupt Status Register 2
07h
INT6
N/A
5
5
28 of 89
INT5
N/A
4
4
INT12
INT4
3
3
INT11
INT3
2
2
INT10
INT2
1
1
INT1
INT9
0
0

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