DS21FF42 Maxim Integrated Products, DS21FF42 Datasheet - Page 39

• Manufacturer Part Number: DS21FF42
• Description: IC FRAMER T1 4X4 16CH 300-BGA
• Manufacturer: Maxim Integrated Products

Specifications of DS21FF42

• Controller Type: T1 Framer
• Interface: Parallel/Serial
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 300mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 300-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

CCR5: COMMON CONTROL REGISTER 5 (Address=19 Hex)
(MSB)
TJC
SYMBOL
SYMBOL
TPCSI
TIRFS
TCM4
TCM3
TCM2
TCM1
TCM0
THSE
RFF
TJC
–
–
–
POSITION
POSITION
CCR4.3
CCR4.2
CCR4.1
CCR4.0
CCR5.7
CCR5.6
CCR5.5
CCR5.4
CCR5.3
CCR5.2
CCR5.1
CCR5.0
–
NAME AND DESCRIPTION
NAME AND DESCRIPTION
Receive Force Freeze. Freezes receive side signaling at
RSIG (and RSER if CCR4.7=1); will override Receive
Freeze Enable (RFE). See Section 14 for details.
0 = do not force a freeze event
1 = force a freeze event
Transmit Hardware Signaling Insertion Enable. See
Section 14 for details.
0 = do not insert signaling from the TSIG pin into the data
stream presented at the TSER pin.
1 = Insert the signaling from the TSIG pin into data stream
presented at the TSER pin.
Transmit Per–Channel Signaling Insert. See Section 14
for details.
0 = do not use TCHBLK to determine which channels should
have signaling inserted from the TSIG pin.
1 = use TCHBLK to determine which channels should have
signaling inserted from the TSIG pin.
Transmit Idle Registers (TIR) Function Select. See
Section 15 for timing details.
0 = TIRs define in which channels to insert idle code
1 = TIRs define in which channels to insert data from RSER
(i.e., Per = Channel Loopback function)
Transmit Japanese CRC6 Enable.
0 = use ANSI/AT&T/ITU CRC6 calculation (normal
operation)
1 = use Japanese standard JT–G704 CRC6 calculation
Not Assigned. Must be set to zero when written.
Not Assigned. Must be set to zero when written.
Transmit Channel Monitor Bit 4. MSB of a channel
decode that determines which transmit channel data will
appear in the TDS0M register. See Section 13 for details.
Transmit Channel Monitor Bit 3.
Transmit Channel Monitor Bit 2.
Transmit Channel Monitor Bit 1.
Transmit Channel Monitor Bit 0. LSB of the channel
decode.
TCM4
39 of 114
TCM3
TCM2
TCM1
TCM0
(LSB)