DS2482S-800+T&R Maxim Integrated Products, DS2482S-800+T&R Datasheet - Page 14

• Manufacturer Part Number: DS2482S-800+T&R
• Description: IC MASTER I2C-1WIRE 8CH 16-SOIC
• Manufacturer: Maxim Integrated Products

Specifications of DS2482S-800+T&R

• Controller Type: I²C Bus Controller
• Interface: I²C
• Voltage - Supply: 3.3 V, 5V
• Current - Supply: 750µA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1-Wire Read Byte
1-Wire Triplet
Command Code
Command Parameter
Description
Typical Use
Restriction
Error Response
Command Duration
1-Wire Activity
Read Pointer Position
Status Bits Affected
Configuration Bits Affected
Command Code
Command Parameter
Description
Typical Use
Restriction
Error Response
Command Duration
1-Wire Activity
Read Pointer Position
Status Bits Affected
Configuration Bits Affected
96h
None
Generates eight read data time slots on the selected 1-Wire IO channel
and stores result in the Read Data Register.
To read data from a 1-Wire IO channel; equivalent to executing eight 1-
Wire Single Bit commands with V = 1 (write 1 time slot), but faster due to
less I²C traffic.
1-Wire activity must have ended before the DS2482 can process this
command.
Command code will not be acknowledged if 1WB = 1 at the time the
command code is received and the command will be ignored.
8 × t
command code acknowledge bit.
Begins maximum 262.5ns after the falling SCL edge of the command
code acknowledge bit.
Status Register (for busy polling)
NOTE: To read the data byte received from the 1-Wire IO channel, issue
the Set Read Pointer command and select the Read Data Register. Then
access the DS2482 in read mode.
1WB (set to 1 for 8 × t
1WS, APU apply
78h
Direction Byte
Generates three times slots, two read-time slots and one-write time slot, at
the selected 1-Wire IO channel. The type of write-time slot depends on the
result of the read-time slots and the direction byte.
The direction byte determines the type of write-time slot if both read-time
slots are 0 (a typical case). In this case the DS2482 will generate a write-1
time slot if V = 1 and a write-0 time slot if V = 0.
If the read-time slots are 0 and 1, there will follow a write 0 time slot.
If the read-time slots are 1 and 0, there will follow a write 1 time slot.
If the read-time slots are both 1 (error case), the subsequent write time
slot will be a write 1.
To perform a 1-Wire Search ROM sequence; a full sequence requires this
command to be executed 64 times to identify and address one device.
1-Wire activity must have ended before the DS2482 can process this
command.
Command code and direction byte will not be acknowledged if 1WB = 1 at
the time the command code is received and the command will be ignored.
3 × t
first bit (MS bit) of the direction byte.
Begins maximum 262.5ns after the falling SCL edge of the MS bit of the
direction byte.
Status Register (for busy polling)
1WB (set to 1 for 3 × t
SBR is updated at the first t
TSB and DIR are updated at the second t
1WS, APU apply
SLOT
SLOT
+ maximum 262.5ns, counted from the falling SCL edge of the
+ maximum 262.5ns, counted from the falling SCL edge of the
14 of 23
SLOT
SLOT
)
)
MSR
MSR
(i.e., at t
SLOT
+ t
MSR
)