DS2482S-800+T&R Maxim Integrated Products, DS2482S-800+T&R Datasheet
DS2482S-800+T&R
Specifications of DS2482S-800+T&R
Related parts for DS2482S-800+T&R
DS2482S-800+T&R Summary of contents
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... Three Address Inputs for I²C Address Assignment Wide Operating Range: 2.9V to 5.5V, -40°C to +85°C 16-Pin SO Package (150 mil) ORDERING INFORMATION DS2482S-800+ DS2482S-800+T&R +Denotes a lead(Pb)-free/RoHS-compliant package. T&R = Tape and reel. PIN CONFIGURATION DS2482-800 PART TEMP RANGE PIN-PACKAGE -40 to +85C ...
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ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground Maximum Current Into Any Pin Operating Temperature Range Junction Temperature Storage Temperature Range Soldering Temperature Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the ...
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PARAMETER Write 0 Low Time Write 0 Recovery Time Reset Low Time Presence-Detect Sample Time Sampling for Short and Interrupt Reset High Time I²C-Pins (Note 7) See Figure 9 LOW Level Input Voltage HIGH Level Input Voltage Hysteresis of Schmitt ...
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Operating current with 1-Wire write byte sequence followed by continuous Read of Status Register at Note 1: 400KHz in Overdrive. Note 2: With standard speed the total capacitive load of the 1-Wire bus should not exceed 1nF, otherwise the passive ...
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Figure 1. Block Diagram T-Time OSC Config Register I²C SDA Interface SCL Controller AD0 AD1 AD2 DETAILED DESCRIPTION The DS2482-800 is a self-timed 8-channel 1-Wire master, which supports advanced 1-Wire waveform features including standard and Overdrive speeds, active pullup, and ...
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Channel Selection Register The content of the Channel Selection Register specifies which of the channels is selected and will be the target of subsequent 1-Wire communication commands. The DS2482-800 supports eight 1-Wire communication channels IO0 to IO7. Only one of ...
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Strong Pullup (SPU) The SPU bit controls whether the DS2482 applies a low-impedance pullup to V bit of either a 1-Wire Write Byte command or after a 1-Wire Single Bit command has completed. The strong pullup feature is commonly used ...
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Speed (1WS) The 1WS bit determines the timing of any 1-Wire communication generated by the DS2482. All 1-Wire slave devices support standard speed (1WS = 0), where the transfer of a single bit (t 65µs. Many 1-Wire device can ...
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Single Bit Result (SBR) The SBR bit reports the logic state of the active 1-Wire line sampled at t first bit of a 1-Wire Triplet command. The power-on default of SBR the 1-Wire Single Bit command sends ...
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Set Read Pointer Command Code Command Parameter Description Typical Use Restriction Error Response Command Duration 1-Wire Activity Read Pointer Position Status Bits Affected Configuration Bits Affected Valid Pointer Codes Register Selection Status Register Read Data Register Channel Selection Register Configuration ...
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Channel Select Command Code Command Parameter Description Typical Use Restriction Error Response Command Duration 1-Wire Activity Read Pointer Position Status Bits Affected Configuration Bits Affected Valid Channel Selection Codes Channel Selection Channel IO0 (default) Channel IO1 Channel IO2 Channel IO3 ...
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Reset Command Code Command Parameter Description Typical Use Restriction Error Response Command Duration 1-Wire Activity Read Pointer Position Status Bits Affected Configuration Bits Affected 1-Wire Single Bit Command Code Command Parameter Description Typical Use Restriction Error Response Command Duration ...
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Figure 5. Write-0 Time Slot IH1 V IL1 Pullup (see Fig. 2) Figure 6. Write-1 and Read-Data Time Slot W1L V IH1 V IL1 Pullup (see Fig. 2) ...
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Read Byte Command Code Command Parameter Description Typical Use Restriction Error Response Command Duration 1-Wire Activity Read Pointer Position Status Bits Affected Configuration Bits Affected 1-Wire Triplet Command Code Command Parameter Description Typical Use Restriction Error Response Command Duration ...
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Bit Allocation in the Direction Byte bit 7 bit 6 bit 5 bit don’t care I²C INTERFACE General Characteristics The I²C bus uses a data line (SDA) plus a clock signal (SCL) for ...
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Figure 8. DS2482 Slave Address Most Signi- ficant Bit I²C Definitions The following terminology is commonly used to describe I²C data transfers. The timing references are defined in Figure 9. Bus Idle or Not Busy: Both, SDA and SCL, are ...
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Not Acknowledged by Master: At some time when receiving data, the master must signal an end of data to the slave device. To achieve this, the master does not acknowledge the last byte that it has received from the slave. ...
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Data Direction Codes Master-to-Slave Slave-to-Master I²C Communication Examples Device Reset, e.g., after power-up S AD,0 A DRST This example includes an optional read access to verify the success of the command. Write Configuration, e.g., before starting 1-Wire activity power-up Case ...
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Reset, e.g., to begin or end 1-Wire communication Case A: 1-Wire idle (1WB = 0), no busy polling to read the result S AD,0 A 1WRS In the first cycle, the master sends the command; then the master waits ...
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Case C: 1-Wire idle (1WB = 0), busy polling until the 1-Wire Command is completed. S AD,0 A 1WRB Sr AD,0 A SRP Poll the Status Register until the 1WB bit has changed from Then set the ...
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Case C: 1-Wire busy (1WB = 1) S AD,0 A 1WT The master should stop and restart as soon as the DS2482 does not acknowledge the command code. Figure 10. Application Schematic Application Information SDA and SCL Pullup Resistors SDA ...
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Only for pullup voltages of 3V and lower can the maximum permissible bus capacitance of 400pF be maintained. A reduced bus capacitance of 300pF is acceptable for pullup voltages of 4V and lower. For fast speed operation at any pullup ...
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REVISION HISTORY REVISION DATE Removed the 1-Wire line termination resistor and references to it from the 8/08 Typical Operating Circuit and Figure 11. Conversion to lead (Pb) free product. 11/09 Removed the presence pulse masking feature. Revised the recommendation on ...