ISP1583BS ST-Ericsson Inc, ISP1583BS Datasheet - Page 51
ISP1583BS
Manufacturer Part Number
ISP1583BS
Description
IC USB CTRL HI-SPEED 64HVQFN
Manufacturer
ST-Ericsson Inc
Datasheet
1.ISP1583BSUM.pdf
(100 pages)
Specifications of ISP1583BS
Controller Type
USB Peripheral Controller
Interface
Parallel/Serial
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
47mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ISP1583BS
Manufacturer:
IDT
Quantity:
1 200
Company:
Part Number:
ISP1583BS
Manufacturer:
PHILPS
Quantity:
1 288
Part Number:
ISP1583BS
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
ISP1583BSUM
Manufacturer:
MICRON
Quantity:
2 000
Company:
Part Number:
ISP1583BSUM
Manufacturer:
ST-ERICS
Quantity:
829
Part Number:
ISP1583BSUM
Manufacturer:
STE
Quantity:
20 000
NXP Semiconductors
Table 54.
Table 56.
ISP1583_7
Product data sheet
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
DMA Transfer Counter register: bit allocation
DMA Configuration register: bit allocation
9.4.3 DMA Configuration register (address: 38h)
15
R/W
R/W
R/W
R/W
-
-
-
31
23
15
0
0
0
0
0
0
7
0
0
reserved
If the DMA counter is disabled in the DMA transfer, it will still decrement and rollover when
it reaches zero.
Table 55.
This register defines the DMA configuration for GDMA mode. The DMA Configuration
register consists of 2 bytes. The bit allocation is given in
Bit
31 to 24
23 to 16
15 to 8
7 to 0
R/W
R/W
R/W
R/W
14
30
22
14
-
-
-
0
0
0
0
0
0
6
0
0
DMA Transfer Counter register: bit description
Symbol
DMACR4 = DMACR[31:24]
DMACR3 = DMACR[23:16]
DMACR2 = DMACR[15:8]
DMACR1 = DMACR[7:0]
MODE
ATA_
R/W
R/W
R/W
R/W
R/W
13
Rev. 07 — 22 September 2008
29
21
13
0
0
0
0
0
0
0
0
5
0
0
DMACR4 = DMACR[31:24]
DMACR3 = DMACR[23:16]
DMACR2 = DMACR[15:8]
DMACR1 = DMACR[7:0]
R/W
R/W
R/W
R/W
R/W
DMA_MODE[1:0]
12
28
20
12
0
0
0
0
0
0
0
0
4
0
0
Description
DMA transfer counter byte 4 (MSByte)
DMA transfer counter byte 3
DMA transfer counter byte 2
DMA transfer counter byte 1 (LSByte)
R/W
R/W
R/W
R/W
R/W
27
19
11
11
0
0
0
0
0
0
3
0
0
0
0
Hi-Speed USB peripheral controller
Table
R/W
R/W
R/W
R/W
R/W
26
18
10
10
0
0
0
0
0
0
2
0
0
0
0
56.
PIO_MODE[2:0]
R/W
R/W
R/W
R/W
R/W
25
17
0
0
0
0
9
0
0
1
0
0
© NXP B.V. 2008. All rights reserved.
9
0
0
ISP1583
R/W
R/W
R/W
R/W
R/W
24
16
0
0
0
0
8
0
0
0
0
0
50 of 99
0
0
8