TDA8026ET/C2,551 NXP Semiconductors, TDA8026ET/C2,551 Datasheet - Page 45
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TDA8026ET/C2,551
Manufacturer Part Number
TDA8026ET/C2,551
Description
IC SMART CARD SLOT 64TFBGA
Manufacturer
NXP Semiconductors
Specifications of TDA8026ET/C2,551
Package / Case
64-TFBGA
Controller Type
Smart Card Interface
Interface
I²C
Voltage - Supply
2.7 V ~ 5.5 V
Current - Supply
210mA
Operating Temperature
-25°C ~ 85°C
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 25 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935288286551
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TDA8026ET/C2,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
TDA8026ET/C2,551
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
Table 47.
V
T
TDA8026_1
Product data sheet
Symbol Parameter
t
t
t
t
C
R
I
Clock input pins: CLKIN1 and CLKIN2
f
V
V
t
t
Logic input pins: A0, SPRES, INHIB, DCDC_OFF and TESTMODE
V
V
I
V
I
C
Logic input pin: SDWNN
V
V
I
C
R
r(o)
r(i)
f(o)
f(i)
pu
clk(ext)
r
f
LIL
LIH
LIH
amb
DD
IL
IH
IL
IH
hys
IL
IH
i
pu(int)
i
i
pu(int)
= V
= 25 C unless otherwise specified.
DD(INTF)
output rise time
input rise time
output fall time
input fall time
input capacitance
internal pull-up
resistance
pull-up current
external clock
frequency
LOW-level input
voltage
HIGH-level input
voltage
rise time
fall time
LOW-level input
voltage
HIGH-level input
voltage
LOW-level input
leakage current
hysteresis voltage
HIGH-level input
leakage current
input capacitance
LOW-level input
voltage
HIGH-level input
voltage
HIGH-level input
leakage current
input capacitance
internal pull-up
resistance
Interface signals to microcontroller
= 3.3 V; f
clk(ext)
= 10 MHz; GND = 0 V; inductor = 10 H; decoupling capacitors on pins V
Conditions
V
10 % to 90 %
V
10 % to 90 %
V
90 % to 10 %
V
90 % to 10 %
between pins I/OUC
V
V
on pins CLKIN1 and CLKIN2
V
1.6 V
V
1.6 V
10 % to 90 %
90 % to 10 %
on pin SPRES
between pins SDWNN and
V
IL
IL
IL
IL
DD(INTF)
OH
DD(INTF)
DD(INTF)
DD(INTF)
minimum to V
minimum to V
maximum to V
maximum to V
= 0.9 V
V
V
All information provided in this document is subject to legal disclaimers.
DD(INTF)
DD(INTF)
> 2 V
> 2 V
DD
, C
…continued
IH
IH
Rev. 1 — 9 March 2010
i
IH
IH
= 30 pF
maximum;
maximum;
2 V
2 V
minimum;
minimum;
(n)
and
[1]
[1]
Min
-
-
-
-
-
9
0
0
0
0.7 V
0.85 V
-
-
0.7 V
-
-
0.7 V
-
2
1
0.3
1
1
0.3
1
DD(INTF)
DD(INTF)
DD(INTF)
DD(INTF)
Multiple smart card slot interface IC
Typ
-
-
-
-
-
11
-
-
-
-
-
-
-
-
-
-
-
0.14V
-
-
-
-
-
-
2.5
DD(INTF)
Max
0.1
1.2
0.1
1.2
10
13
-
20
0.3 V
0.15V
V
V
0.1 / f
0.1 / f
+0.3 V
V
+1
-
10
+0.3 V
V
10
3
1
1
DD(INTF)
DD(INTF)
DD(INTF)
DD(INTF)
TDA8026
DD
© NXP B.V. 2010. All rights reserved.
DD(INTF)
and V
clk(ext)
clk(ext)
DD(INTF)
DD(INTF)
DD(INTF)
+ 0.3
+ 0.3
+ 0.3
+ 0.3
UP
= 10 F;
45 of 59
Unit
pF
k
mA
MHz
V
V
V
V
ns
ns
V
V
V
pF
V
V
pF
M
s
s
s
s
A
A
A