TDA8025HN/C1,551 NXP Semiconductors, TDA8025HN/C1,551 Datasheet - Page 6
![IC SMART CARD INTERFACE 32-HVQFN](/photos/6/51/65170/568-32-hvqfn_sml.jpg)
TDA8025HN/C1,551
Manufacturer Part Number
TDA8025HN/C1,551
Description
IC SMART CARD INTERFACE 32-HVQFN
Manufacturer
NXP Semiconductors
Datasheet
1.TDA8025HNC1518.pdf
(38 pages)
Specifications of TDA8025HN/C1,551
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Controller Type
Smart Card Interface
Interface
Analog
Voltage - Supply
1.2V, 1.8V, 3V
Current - Supply
65mA
Operating Temperature
-25°C ~ 85°C
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 25 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935286389551
NXP Semiconductors
TDA8025_1
Product data sheet
Table 3.
[1]
[2]
[3]
[4]
Symbol
CGND
CLK
CONFIG
RST
V
V
GND
V
RSTIN
OFFN
TEST3
PORADJ
ENCLKIN
XTAL2
XTAL1
I/OUC
AUX1UC
AUX2UC
TEST4
CC
DD(INTREGD)
DDI(REG)
I = input, O = output, I/O = input/output, G = ground and P = power supply.
If pin PRESN or pin PRES is true, the card is considered to be present. During card insertion, debouncing
can occur on these signals. To counter this, the TDA8025 has a built-in debouncing timer (typically 4.5 ms).
Using the internal pull-up resistor connected to pin V
Using the internal pull-up resistor connected to pin V
Pin description
Pin Type
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
G
O
I
O
P
P
G
P
I
O
O
I
I
O
I
I/O
I/O
I/O
I
[1]
Rev. 01 — 6 April 2009
…continued
Description
card signal ground
card clock (C3)
3.3 V or 5 V core regulator supply voltage selection; see
page 7
card reset (C2)
card supply (C1); decouple to pin CGND using one 470 nF and one
220 nF capacitor with an Equivalent Series Resistance
(ESR) < 100 m
internally regulated supply voltage
ground
regulator input supply voltage
microcontroller card reset input; active HIGH
NMOS interrupt to microcontroller
on page 19
test pin; do not connect to the application
power-on reset threshold adjustment input
enable external clock on pin XTAL1; active HIGH
crystal connection pin; open when used with an external clock source
crystal connection pin; supply reference V
external clock input; supply reference V
microcontroller input/output data line
microcontroller auxiliary 1 input/output data line
microcontroller auxiliary 2 input/output data line
test pin; connect to GND
CC
DD(INTF)
.
.
[4]
; active LOW; see
[4]
DD(INTF)
DD(INTREGD)
[4]
[4]
[4]
TDA8025
© NXP B.V. 2009. All rights reserved.
IC card interface
Section 8.10
Figure 3 on
6 of 38