TDA8034HN/C1,151 NXP Semiconductors, TDA8034HN/C1,151 Datasheet - Page 8

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TDA8034HN/C1,151

Manufacturer Part Number
TDA8034HN/C1,151
Description
IC SMARD CARD INTERFACE 24HVQFN
Manufacturer
NXP Semiconductors
Type
Smart Card Interfacer
Datasheet

Specifications of TDA8034HN/C1,151

Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Controller Type
Smart Card Interface
Interface
Analog
Voltage - Supply
1.8V, 3V, 5V
Current - Supply
65mA
Operating Temperature
-25°C ~ 85°C
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 25 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935288352151
NXP Semiconductors
TDA8034HN
Product data sheet
8.4 Input and output circuits
8.5 Shutdown mode
8.6 Deep shutdown mode
When pins I/O and I/OUC are pulled HIGH using an 11 kΩ resistor between pins I/O and
V
referenced to V
The first side on which a falling edge occurs becomes the master. An anti-latch circuit
disables falling edge detection on the other line, making it the slave. After a time delay t
the logic 0 present on the master-side is sent to the slave-side. When the master-side
returns logic 1, the slave-side sends logic 1 during time delay (t
both master and slave sides return to their idle states.
The active pull-up feature ensures fast LOW-to-HIGH transitions making the TDA8034HN
capable of delivering more than 1 mA, up to an output voltage of 0.9V
80 pF. At the end of the active pull-up pulse, the output voltage is dependent on the
internal pull-up resistor value and load current. The current sent to and received from the
card’s I/O lines is limited to 15 mA at a maximum frequency of 1 MHz.
After a power-on reset, if pin CMDVCCN is HIGH, the circuit enters the Shutdown mode,
ensuring only the minimum number of circuits are active while the TDA8034HN waits for
the microcontroller to start a session.
When the smart card reader is inactive, the TDA8034HN will enter Deep shutdown mode
if pin CMDVCCN is forced HIGH and pins VCC_SEL1 and VCC_SEL2 are LOW. In Deep
shutdown mode, all circuits are disabled and pin OFFN follows the status of pin PRESN.
Changing the status of either pin CMDVCCN, VCC_SEL1 or VCC_SEL2 exits Deep
shutdown mode; see
CC
all card contacts are inactive. The impedance between the contacts and GND is
approximately 200 Ω.
pins I/OUC, AUX1UC and AUX2UC are high-impedance using the 11 kΩ pull-up
resistor connected to V
the voltage generators are stopped
the voltage supervisor is active
the internal oscillator runs at its lowest frequency (f
and/or between pins I/OUC and V
CC
All information provided in this document is subject to legal disclaimers.
and pin I/OUC to V
Figure
Rev. 3.0. — 17 January 2011
DD(INTF)
6.
DD(INTF)
DD(INTF)
, thus allowing operation at V
, both lines enter the idle state. Pin I/O is
osc(int)low
w(pu)
)
TDA8034HN
). After this sequence,
Smart card interface
CC
© NXP B.V. 2011. All rights reserved.
, at a load of
CC
≠ V
DD(INTF)
8 of 30
d
.
,

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