TDA8034HN/C1,151 NXP Semiconductors, TDA8034HN/C1,151 Datasheet - Page 19

• Manufacturer Part Number: TDA8034HN/C1,151
• Description: IC SMARD CARD INTERFACE 24HVQFN
• Manufacturer: NXP Semiconductors
• Type: Smart Card Interfacer

Specifications of TDA8034HN/C1,151

• Package / Case: 24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
• Controller Type: Smart Card Interface
• Interface: Analog
• Voltage - Supply: 1.8V, 3V, 5V
• Current - Supply: 65mA
• Operating Temperature: -25°C ~ 85°C
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 25 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935288352151

NXP Semiconductors
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
Table 8.
Table 9.
TDA8034HN
Product data sheet
Symbol
I
I
T
Symbol
t
t
t
t
Olim
sd
act
deact
d
deb
sd
To meet these specifications, V
one 220 nF and one 470 nF.
Using decoupling capacitors of one 220 nF ±20 % and one 470 nF ±20 %.
Using the integrated 9 kΩ pull-up resistor connected to V
Using the integrated 10 kΩ pull-up resistor connected to V
The transition time and the duty factor definitions are shown in
Pins PRESN and CMDVCCN are active LOW; pin RSTIN is active HIGH; see
Pin PRESN has an integrated current source of 1.25 μA to V
Pin OFFN is an NMOS drain, using an internal 20 kΩ pull-up resistor connected to V
Protection characteristics
Timing characteristics
Parameter
output current limit
shutdown current
shutdown temperature
Parameter
activation time
deactivation time
delay time
debounce time
Fig 11. Definition of output and input transition times
CC
should be decoupled to pin GND using two ceramic multilayer capacitors of low ESR with values of
Conditions
see
see
CLK sent to card using an external clock
pin PRESN
t
t
d(start)
d(end)
All information provided in this document is subject to legal disclaimers.
Figure 7 on page 10
Figure 8 on page 11
= t5; see
pin I/O
at die
Conditions
pin V
pin CLK
pin RST
pin V
= t3; see
Rev. 3.0. — 17 January 2011
10 %
t
r
CC
CC
CC
90 %
DD(INTF)
.
Figure 7 on page 10
Figure 7 on page 10
DD(INTF)
Figure 11 on page
t1
.
90 %
.
10 %
t
f
Table 4
t2
19; δ = t1 / (t1 + t2).
-
Min
−15
135
−70
−20
90
DD(INTF)
for states of pins CLKDIV1 and CLKDIV2.
.
V
(V
V
Typ
-
175
-
-
120
150
Min
2090
35
2090
2120
OH
OL
3.2
OH
+ V
001aai973
TDA8034HN
OL
) / 2
Typ
-
90
-
-
4.5
Smart card interface
-
Max
+15
225
+70
+20
150
© NXP B.V. 2011. All rights reserved.
6.4
Max
4160
250
4112
4160
mA
mA
Unit
mA
mA
mA
°C
19 of 30
Unit
μs
μs
μs
μs
ms