LAN9210-ABZJ SMSC, LAN9210-ABZJ Datasheet - Page 95
LAN9210-ABZJ
Manufacturer Part Number
LAN9210-ABZJ
Description
IC ETHERNET CTLR SGL CHIP 56-QFN
Manufacturer
SMSC
Datasheet
1.LAN9210-ABZJ.pdf
(147 pages)
Specifications of LAN9210-ABZJ
Controller Type
Ethernet Controller
Interface
Serial EEPROM
Voltage - Supply
3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
638-1048-6
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LAN9210-ABZJ
Manufacturer:
Standard
Quantity:
2 500
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Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
Datasheet
SMSC LAN9210
5.3.15
31-30
28-16
BITS
BITS
15-0
[22]
4:3
2:0
29
0
0
0
0
1
1
1
1
Reserved
GP Timer Enable (TIMER_EN). When a one is written to this bit the GP
Timer is put into the run state. When cleared, the GP Timer is halted. On
the 1 to 0 transition of this bit the GPT_LOAD field will be preset to FFFFh.
Reserved
General Purpose Timer Pre-Load (GPT_LOAD). This value is pre-loaded
into the GP-Timer.
GPO Data 3-4 (GPODn). The value written is reflected on GPOn.
GPIO Data 0-2 (GPIODn). When enabled as an output, the value written is
reflected on GPIOn. When read, GPIOn reflects the current state of the
corresponding GPIO pin.
GPO3 – bit 3
GPO4 – bit 4
GPIO0 – bit 0
GPIO1 – bit 1
GPIO2 – bit 2
GPT_CFG-General Purpose Timer Configuration Register
This register configures the General Purpose timer. The GP Timer can be configured to generate host
interrupts at intervals defined in this register.
[21]
0
0
1
1
0
0
1
1
Offset:
[20]
0
1
0
1
0
1
0
1
Table 5.4 EEPROM Enable Bit Definitions
DESCRIPTION
DESCRIPTION
8Ch
EEDIO FUNCTION
DATASHEET
TX_CLK
TX_EN
TX_EN
EEDIO
GPO3
GPO3
95
Size:
Reserved
Reserved
32 bits
EECLK FUNCTION
TYPE
RX_CLK
R/W
R/W
EECLK
RX_DV
RX_DV
RO
RO
GPO4
GPO4
TYPE
R/W
R/W
Revision 2.7 (03-15-10)
DEFAULT
DEFAULT
FFFFh
000
0
-
-
00
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