LAN9210-ABZJ SMSC, LAN9210-ABZJ Datasheet - Page 88

• Manufacturer Part Number: LAN9210-ABZJ
• Description: IC ETHERNET CTLR SGL CHIP 56-QFN
• Manufacturer: SMSC

Specifications of LAN9210-ABZJ

• Controller Type: Ethernet Controller
• Interface: Serial EEPROM
• Voltage - Supply: 3.3V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 638-1048-6

Revision 2.7 (03-15-10)
BITS
0
Soft Reset (SRST). Writing 1 generates a software initiated reset. This reset
generates a full reset of the MAC CSR’s. The SCSR’s (system command
and status registers) are reset except for any NASR bits. Soft reset also
clears any TX or RX errors (TXE/RXE). This bit is self-clearing.
Notes:
Do not attempt a soft reset unless the PHY is fully awake and operational.
After a PHY reset, or when returning from a reduced power state, the PHY
must given adequate time to return to the operational state before a soft
reset can be issued.
The LAN9210 must always be read at least once after power-up, reset, or
upon return from a power-saving state or write operations will not function.
DESCRIPTION
DATASHEET
88
Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
TYPE
SC
DEFAULT
SMSC LAN9210
Datasheet
0