LAN9210-ABZJ SMSC, LAN9210-ABZJ Datasheet - Page 108
LAN9210-ABZJ
Manufacturer Part Number
LAN9210-ABZJ
Description
IC ETHERNET CTLR SGL CHIP 56-QFN
Manufacturer
SMSC
Datasheet
1.LAN9210-ABZJ.pdf
(147 pages)
Specifications of LAN9210-ABZJ
Controller Type
Ethernet Controller
Interface
Serial EEPROM
Voltage - Supply
3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
638-1048-6
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LAN9210-ABZJ
Manufacturer:
Standard
Quantity:
2 500
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Revision 2.7 (03-15-10)
5.4.2
31-16
BITS
15-0
Reserved
Physical Address [47:32]. This field contains the upper 16-bits (47:32) of the Physical Address of
the LAN9210 device. The content of this field is undefined until loaded from the EEPROM at power-
on. The host can update the contents of this field after the initialization process has completed.
ADDRH—MAC Address High Register
The MAC Address High register contains the upper 16-bits of the physical address of the MAC. The
contents of this register are optionally loaded from the EEPROM at power-on through the EEPROM
Controller if a programmed EEPROM is detected. The least significant byte of this register (bits [7:0])
is loaded from address 0x05 of the EEPROM. The second byte (bits [15:8]) is loaded from address
0x06 of the EEPROM. Please refer to
details the byte ordering of the ADDRL and ADDRH registers with respect to the reception of the
Ethernet physical address.
Offset:
Default Value:
2
0000FFFFh
DATASHEET
Section 4.6
108
DESCRIPTION
Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
Attribute:
Size:
for more information on the EEPROM. Section
R/W
32 bits
SMSC LAN9210
Datasheet
5.4.3
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