CS8900A-IQ3Z Cirrus Logic Inc, CS8900A-IQ3Z Datasheet - Page 75
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CS8900A-IQ3Z
Manufacturer Part Number
CS8900A-IQ3Z
Description
IC LAN ETHERNET CTLR 3V 100LQFP
Manufacturer
Cirrus Logic Inc
Type
Single Chipr
Specifications of CS8900A-IQ3Z
Package / Case
100-LQFP
Controller Type
Ethernet Controller (IEEE 802.3)
Interface
ISA-BUS
Voltage - Supply
3V, 5V
Current - Supply
95mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Ethernet Connection Type
10BASE- 2 or 10BASE- 5 or 10BASE- F or 10BASE- T
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Standard Supported
IEEE 802.3
Data Rate
10 Mbps
Supply Voltage (max)
6 V
Supply Voltage (min)
- 0.3 V
Supply Current (max)
+/- 10 mA
Maximum Operating Temperature
+ 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1163 - KIT EVAL FOR CS8900A
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1129
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DS271F5
3) Once the CS8900A is ready to accept the
For a more detailed description of transmit,
see Section 5.6 on page 99.
4.9.4 Basic Memory Mode Receive
Memory Mode receive operations occur in the
following order (interrupts used to signal the
presence of a valid receive frame):
1) A frame is received by the CS8900A, trig-
2) The host reads the Interrupt Status Queue
3) The host reads RxStatus (memory base +
4) The host reads RxLength (memory base +
5) The host reads the frame data by execut-
For a more detailed description of receive, see
Section 5.2 on page 78.
CS8900A
Crystal LAN™ Ethernet Controller
can be written. If clear, the host must wait
for CS8900A buffer memory to become
available. If Rdy4TxiE (Register B, Buf-
CFG, Bit 8) is set, the host will be interrupt-
ed when Rdy4Tx (Register C, BufEvent, Bit
8) becomes set.
frame, the host executes repetitive memo-
ry-to-memory move instructions (REP
MOVS) to memory base + 0A00h to trans-
fer the entire frame from host memory to
CS8900A memory.
gering an enabled interrupt.
(memory base + 0120h) and is informed of
the receive frame.
0400h) to learn the status of the receive
frame.
0402h) to learn the frame's length.
ing repetitive memory-to-memory move in-
structions (REP MOVS) from memory base
+ 0404h to transfer the entire frame from
CS8900A memory to host memory.
CIRRUS LOGIC PRODUCT DATASHEET
4.9.5 Polling the CS8900A in Memory
Mode
If interrupts are not used, the host can poll the
CS8900A to check if receive frames are pres-
ent and if memory space is available for trans-
mit. However, this is beyond the scope of this
data sheet.
4.10 I/O Space Operation
In I/O Mode, PacketPage memory is accessed
through eight 16-bit I/O ports that are mapped
into 16 contiguous I/O locations in the host
system's I/O space. I/O Mode is the default
configuration for the CS8900A and is always
enabled. On power up, the default value of the
I/O base address is set at 300h. (Note that
300h is typically assigned to LAN peripherals).
The I/O base address may be changed to any
available XXX0h location, either by loading
configuration data from the EEPROM, or dur-
ing system setup. Table 18 shows the
CS8900A I/O Mode mapping.
4.10.1 Receive/Transmit Data Ports 0 and
1
These two ports are used when transferring
transmit data to the CS8900A and receive
data from the CS8900A. Port 0 is used for 16-
bit operations and Ports 0 and 1 are used for
32-bit operations (lower-order word in Port 0).
4.10.2 TxCMD Port
The host writes the Transmit Command (TxC-
MD) to this port at the start of each transmit op-
Offset
000Ah Read/Write PacketPage Pointer
000Ch Read/Write PacketPage Data (Port 0)
000Eh Read/Write PacketPage Data (Port 1)
0000h Read/Write Receive/Transmit Data (Port 0)
0002h Read/Write Receive/Transmit Data (Port 1)
0004h
0006h
0008h
Write-only TxCMD (Transmit Command)
Write-only TxLength (Transmit Length)
Read-only Interrupt Status Queue
Type
Table 18. I/O Mode Mapping
Description
75