SJA1000T/N1,112 NXP Semiconductors, SJA1000T/N1,112 Datasheet - Page 22

• Manufacturer Part Number: SJA1000T/N1,112
• Description: IC STAND-ALONE CAN CTRLR 28-SOIC
• Manufacturer: NXP Semiconductors

Specifications of SJA1000T/N1,112

• Package / Case: 28-SOIC (7.5mm Width)
• Controller Type: CAN Interface
• Interface: CAN
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 15mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Product: Controller Area Network (CAN)
• Number Of Transceivers: 1
• Data Rate: 1 Mbps
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Supply Current (max): 15 mA
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-3994-5; 935230920112; SJA1000TD; SJA1000TD

Philips Semiconductors
Notes
1. It should be noted that the registers are repeated within higher CAN address areas (the most significant bit of the
2. Test register is used for production testing only. Using this register during normal operation may result in undesired
3. SFF = Standard Frame Format.
4. EFF = Extended Frame Format.
5. These address allocations reflect the FIFO RAM space behind the current message. The contents are random after
6. Some bits are writeable in reset mode only (CAN mode, CBP, RXINTEN and clock off).
2000 Jan 04
ADDRESS
27
28
29
30
31
32
33
95
96
108
109
110
111
112
127
Stand-alone CAN controller
CAN
8-bit CPU address is not decoded: CAN address 128 continues with CAN address 0 and so on).
behaviour of the device.
power-up and contain the beginning of the next message which is received after the current one. If no further
message is received, parts of old messages may occur here.
(FIFO RAM);
note 5
(FIFO RAM);
note 5
RX message counter
RX buffer start address
clock divider
internal RAM address 0 (FIFO)
internal RAM address 1 (FIFO)
internal RAM address 63
(FIFO)
internal RAM address 64
(TX buffer)
internal RAM address 76
(TX buffer)
internal RAM address 77 (free)
internal RAM address 78 (free)
internal RAM address 79 (free)
(00H)
(00H)
READ
RX data 7
RX data 8
OPERATING MODE
clock divider; note 6
22
WRITE
TX data 7
TX data 8
reserved (00H)
reserved (00H)
RX message
counter
RX buffer start
address
clock divider
internal RAM
address 0
internal RAM
address 1
internal RAM
address 63
internal RAM
address 64
internal RAM
address 76
internal RAM
address 77
internal RAM
address 78
internal RAM
address 79
(00H)
(00H)
READ
RESET MODE
Product specification
RX buffer start
address
clock divider
internal RAM
address 0
internal RAM
address 1
internal RAM
address 63
internal RAM
address 64
internal RAM
address 76
internal RAM
address 77
internal RAM
address 78
internal RAM
address 79
SJA1000
WRITE