MAX9856ETL+T Maxim Integrated Products, MAX9856ETL+T Datasheet - Page 15

IC AUDIO CODEC 40TQFN-EP

MAX9856ETL+T

Manufacturer Part Number
MAX9856ETL+T
Description
IC AUDIO CODEC 40TQFN-EP
Manufacturer
Maxim Integrated Products
Type
Audio Codecr
Datasheet

Specifications of MAX9856ETL+T

Data Interface
Serial
Resolution (bits)
18 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
Yes
S/n Ratio, Adcs / Dacs (db) Typ
77 / 91
Dynamic Range, Adcs / Dacs (db) Typ
85 / 91
Voltage - Supply, Analog
1.71 V ~ 3.6 V
Voltage - Supply, Digital
1.71 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
40-WFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIN
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
HGNDSNS
LGNDSNS
LRCLK_D
LINEIN1
LINEIN2
CPGND
CPVDD
LOUTL
LOUTR
MBIAS
NAME
AUXIN
NREG
PREG
AVDD
SVSS
PVSS
HPR
C1N
SDA
REF
HPL
C1P
SCL
IRQ
______________________________________________________________________________________
Line 1 Input. AC-couple signal to LINEIN1 with a 1µF capacitor.
Line 2 Input. AC-couple signal to LINEIN2 with a 1µF capacitor.
Auxiliary Input. Input for beep and sound effect signals or can be used for DC measurements.
Positive Internally Regulated Supply (+1.6V ±5%). Bypass to AGND with 1µF capacitor.
Negative Internally Regulated Supply (-1.15V ±5%). Bypass to AGND with 1µF capacitor.
Internal Microphone Bias Regulator Output (1.23V ±5%). Bypass to AGND with a 1µF capacitor.
Converter Reference (1.23V ±5%). Bypass to AGND with a 1µF capacitor.
Line Output Ground Sense. Feedback path to line-out amplifiers for noise reduction. Connect to the ground
pin of the line output jack. Connect directly to AGND, if ground sense is not required.
Left-Channel Line Output. Ground-referenced DirectDrive output.
Right-Channel Line Output. Ground-referenced DirectDrive output.
Headphone Ground Sense. Feedback path to headphone amplifiers for noise reduction. Connect to the
ground pin of the headphone jack. Connect directly to AGND if ground sense is not required.
Analog Power Supply. Bypass to AGND with 10µF and 0.1µF capacitors.
Left Headphone DirectDrive Output
Right Headphone DirectDrive Output
Negative Power-Supply Input. Connect to PVSS and bypass to CPGND with a 4.7µF capacitor.
Internally Generated Negative Supply. Connect to SVSS.
Charge-Pump Flying Capacitor Negative Terminal. Connect a 4.7µF capacitor between C1N and C1P.
Charge-Pump Ground
Charge-Pump Flying Capacitor Positive Terminal. Connect a 4.7µF capacitor between C1P and C1N.
Charge-Pump Positive Supply. Bypass to CPGND with a 4.7µF capacitor.
I
I
Hardware Interrupt Output. IRQ can be programmed to pull low when bits in the status register 0x00
change state. Read status register 0x00 to clear IRQ once set. Repeat faults have no effect on IRQ until it is
cleared by reading the I
swing.
Digital Audio Left-Right Clock Input/Output. LRCLK_D is the audio sample rate clock that determines
whether the audio data on SDIN is routed to the left or right channel. LRCLK_D is an input when the
MAX9856 is in slave mode and an output when in master mode. LRCLK_D is also used with SDOUT if
LRCLK_A is configured as a GPIO.
2
2
C Serial-Clock Input. Connect a 10kΩ pullup resistor to DVDD.
C Serial-Data Input/Output. Connect a 10kΩ pullup resistor to DVDD.
DirectDrive Headphone Amplifiers
2
Low-Power Audio CODEC with
C status register 0x00. Connect a 10kΩ pullup resistor to DVDD for full output
FUNCTION
Pin Description
15

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