IDTSTAC9752AXTAED1X IDT, Integrated Device Technology Inc, IDTSTAC9752AXTAED1X Datasheet - Page 82
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IDTSTAC9752AXTAED1X
Manufacturer Part Number
IDTSTAC9752AXTAED1X
Description
IC CODEC AC'97 MIC/JACK 48-QFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Audio Codec '97r
Datasheet
1.IDTSTAC9752AXNAED1XR.pdf
(106 pages)
Specifications of IDTSTAC9752AXTAED1X
Resolution (bits)
20 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
Yes
S/n Ratio, Adcs / Dacs (db) Typ
85 / 92
Voltage - Supply, Analog
3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.14 V ~ 3.47 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
STAC9752AXTAED1X
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IDTSTAC9752AXTAED1X
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Company:
Part Number:
IDTSTAC9752AXTAED1XR
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
IDT™
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
STAC9752A/9753A
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
7.4.11.
7.4.12.
7.4.13.
Bit(s) Reset Value
14:12
10:3
15
11
2
1
0
EAPD
EN15
EN7
D15
D15
D7
D7
EAPD Access Register (74h)
Default: 0800h
Register 78h Enable (76h)
Default: 0000h
Universal Jacks
To unlock Register 78h, write 0xABBA to Register 76h.
0
0
1
0
0
0
0
EN14
D14
D14
EN6
D6
D6
EAPD_OEN
GPIOSLT12
GPIOACC
Reserved
Reserved
INTDIS
Name
EAPD
™
Selection (78h)
Reserved
Reserved
EN13
EN5
D13
D13
D5
D5
EAPD data Enable
EAPD data output on EAPD when bit D11 = 1
EAPD data input from pin when bit D11 = 0
Bit not used, should read back 0
EAPD Pin Enable
0 = EAPD configured as input pin
1 = EAPD configured as output pin
Bit not used, should read back 0
Interrupt disable option.
Interrupts cleared by writing a 1 to I4 (Reg24h:D15)
0 = will clear both SENSE and GPIO interrupts
1 = will only clear SENSE interrupts. GPIO interrupts will have to be cleared in
Reg54h.
GPIO ACCESS
0 = ACLINK access from GPIO Pads
1 = ACLINK access from GPIO Register 54h
0 = GPIO0/1 access via Reg54h when GPIO is set as an output, for input Slot12
data will be 0h.
1 = GPIO0/1 access via Slot 12 when GPIO is set as an output, for inputs
Reg54h will not be updated.
This can only be used if a modem CODEC is not present in the system and using
Slot12.
EN12
EN4
D12
D12
82
D4
D4
EAPD_OEN
EN11
EN3
D11
D11
D3
D3
Description
INTDIS
STAC9752A/9753A
EN10
D10
D10
EN2
D2
D2
GPIOACC
Reserved
EN9
EN1
D9
D1
D9
D1
GPIOSLT12
PC AUDIO
EN8
EN0
V 1.5 1206
D8
D0
D8
D0