IDTSTAC9753XXTAEB2XR IDT, Integrated Device Technology Inc, IDTSTAC9753XXTAEB2XR Datasheet - Page 13

• Manufacturer Part Number: IDTSTAC9753XXTAEB2XR
• Description: IC CODEC AC'97 MIC/JACK 48-QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Audio Codec '97r

Specifications of IDTSTAC9753XXTAEB2XR

• Resolution (bits): 20 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Voltage - Supply, Analog: 3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.14 V ~ 3.47 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: STAC9753XXTAEB2XR

Note:
IDT™
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
STAC9752/9753
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
1.
2.
3.
4.
5.
SNR (idle channel) (Note 5)
A/D & D/A Digital Filter Pass Band (Note 6)
A/D & D/A Digital Filter Transition Band
A/D & D/A Digital Filter Stop Band
A/D & D/A Digital Filter Stop Band Rejection (Note 7)
DAC Out-of-Band Rejection (Note 8)
Group Delay (48 KHz sample rate)
Power Supply Rejection Ratio (1 KHz)
Power Supply Rejection Ratio (20 KHz)
Any Analog Input to LINE_OUT Crosstalk
(10 KHz Signal Frequency)
Any Analog Input to LINE_OUT Crosstalk
(1 KHz Signal Frequency)
Spurious Tone Rejection
Attenuation, Gain Step Size
Input Impedance
Input Capacitance
VREFout
VREF
Interchannel Gain Mismatch ADC
Interchannel Gain Mismatch DAC
Gain Drift
DAC Offset Voltage
Deviation from Linear Phase
LINE_OUT / MONO_OUT Load Resistance
LINE_OUT / MONO_OUT Load Capacitance
HEADPHONE_OUT Load Resistance
HEADPHONE_OUT Load Capacitance
Mute Attenuation
PLL lock time
PLL 24.576 MHz clock jitter
PLL frequency multiplication tolerance
PLL bit clock jitter
HEADPHONE_OUT (32
HEADPHONE_OUT (10 K load)
DAC to LINE_OUT
DAC in BYPASS Mode
LINE / AUX / VIDEO to LINE_OUT
LINE_IN to A/D with High Pass Filter enabled
With +30dB Boost on, 1.00 Vrms with Boost off.
Ratio of Full Scale signal to noise output with -60dB signal, measured “A-weighted” over a 20 Hz to a 20 KHz bandwidth.
± 1dB limits for Line Output & 0 dB gain, at -20dBV
Ratio of Full Scale signal to THD+N output with -3dB signal, measured “A-weighted” over a 20 Hz to a 20 KHz bandwidth.
48 KHz Sample Frequency
Ratio of Full Scale signal to idle channel noise output is measured “A-weighted” over a 20 Hz to a 20 KHz bandwidth.
(AES17-1991 Idle Channel Noise or EIAJ CP-307 Signal-to-noise Ratio).
Parameter
load)
13
19,200
28,800
-100
Min
-55
80
20
10
90
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.45X AVdd
0.5 X AVdd
-100
-100
Typ
100
100
-68
-81
-70
-40
-80
1.5
90
92
90
92
50
15
10
32
96
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
STAC9752/9753
19,200
28,800
Max
12.5
100
200
750
750
0.5
0.5
20
50
1
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
REV 3.3 1206
degrees
ppm/ºC
psec
psec
Unit
ppm
K
mV
K
ms
dB
dB
dB
dB
dB
dB
Hz
Hz
Hz
dB
dB
dB
dB
dB
dB
dB
dB
pF
dB
dB
pF
pF
dB
sec
V
V