IDTSTAC9200X3NAEB1XR IDT, Integrated Device Technology Inc, IDTSTAC9200X3NAEB1XR Datasheet - Page 33

IC AUDIO CODEC 2CH HD 32-QFN

IDTSTAC9200X3NAEB1XR

Manufacturer Part Number
IDTSTAC9200X3NAEB1XR
Description
IC AUDIO CODEC 2CH HD 32-QFN
Manufacturer
IDT, Integrated Device Technology Inc
Type
Audio Codec, HDr
Datasheet

Specifications of IDTSTAC9200X3NAEB1XR

Resolution (bits)
24 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
No
S/n Ratio, Adcs / Dacs (db) Typ
85 / 100
Dynamic Range, Adcs / Dacs (db) Typ
80 / 95
Voltage - Supply, Analog
3.14 V ~ 3.47 V; 3.8 V ~ 4.2 V; 4.28 V ~ 4.73 V; 4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.14 V ~ 3.47 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
32-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
STAC9200X3NAEB1XR
IDT™
STAC9200
2-CHANNEL HIGH DEFINITION AUDIO CODEC
2-CHANNEL HIGH DEFINITION AUDIO CODEC
5.4.12. AFG GPIO
[31.:4]
[31.:8]
[5.:0]
Bit
[3]
[2]
Bit
[7]
[6]
Set1
Get
Bitfield Name
Bitfield Name
Data3
Data2
Rsvd
Rsvd2
Rsvd1
Tag
En
Table 31. AFG UnsolResp Command Response Format
Table 33. AFG GPIO Command Response Format
Table 32. AFG GPIO Command Verb Format
Verb ID
F15
715
IDT CONFIDENTIAL
RW
RW
RW
R
RW
RW
RW
R
R
33
Reset
See bits [7:0] of bitfield table
0x0
0x0
0x0
Reset
0x0
0x0
0x0
0x0
Payload
Reserved
Data for GPIO3 (Pin 47/EAPD). If this GPIO bit
is configured as Sticky (edge-sensitive) input, it
can be cleared by writing zero (one) here when
the corresponding Polarity Control bit is zero
(one).
Data for GPIO2 (Pin 45). If this GPIO bit is
configured as Sticky (edge-sensitive) input, it
can be cleared by writing zero (one) here when
the corresponding Polarity Control bit is zero
(one).
00
Reserved
Allow generation of Unsolicited Responses.
Reserved
Software programmable field returned in top
six bits (31:26) of every Unsolicited
Response generated by this node.
STAC9200
Description
Description
See bitfield table
0000_0000h
Response
PC AUDIO
V 1.6 01/08

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