GCIXP1240AC Intel, GCIXP1240AC Datasheet - Page 54

• Manufacturer Part Number: GCIXP1240AC
• Description: IC MPU NETWORK 232MHZ 432-BGA
• Manufacturer: Intel

Specifications of GCIXP1240AC

• Rohs Status: RoHS non-compliant
• Processor Type: Network
• Features: 32-bit StrongARM RISC Core
• Speed: 232MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 432-BGA
• Mounting: Surface Mount
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 837152

Intel
54
Table 25. 64-Bit Bidirectional IX Bus, 1-2 MAC Mode
®
IXP1240 Network Processor
GPIO[3:1]
GPIO[0
RDYCTL_L[3:0]
RDYCTL_L[4]
RDYBUS[7:0]
PORTCTL_L[3:0]
FPS[2:0]
SOP
SOP32
EOP
EOP32
TK_IN
TK_OUT
RXFAIL
TXASIS
FBE_L[7:0]
FDAT[63:0]
FAST_RX1
FAST_RX2
Signal
Active High, input/output assigned to StrongARM* core not used for MAC interface.
Active Low, output flow-control enable for MAC 0.
Active Low, output, enables for Transmit or Receive Ready flags.
Active Low, output, flow-control enable for MAC 1.
Active High, input/output, Transmit or Receive Ready flags, and flow control mask
data.
Active Low, output, transmit and receive device selects.
Active High, output, port select.
Active High, input/output, Start of Packet indication. SOP is an output during
transmit according to values programmed in the TFIFO control field. Is an input
during receives indicating Receive Start of Packet from MAC.
Output, not used, no connect.
Active High, input/output, End of Packet indication. EOP is an output during
transmit according to values programmed in the TFIFO control field. Is an input
during receives indicating Receive End of Packet from MAC.
Input/output, not used, terminate through 10 KOhms to VDDX.
Input, not used, must be pulled High in this mode.
Output, not used, no connect.
Active High, input/output.
Input - Receive Error input.
Output - driven low during transmit and when bus maintains a No-Select state.
Active High, output. TXASIS states are output according to values programmed in
the TFIFO Control field. TXASIS state is output coincident with SOP signal,
Active Low, byte enables for FDAT [64:0].
Active High, read and write data.
Active High ready input from FastPort 0, pulldown 10 KOhms to GND if not used.
Active High ready input from FastPort 1, pulldown 10 KOhms to GND if not used.
Description
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