MC68EN360ZQ25VL Freescale Semiconductor, MC68EN360ZQ25VL Datasheet - Page 5

• Manufacturer Part Number: MC68EN360ZQ25VL
• Description: IC MPU QUICC 32BIT 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68EN360ZQ25VL

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3V
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

1.1
1.2
1.2.1
1.2.2
1.2.3
1.3
1.3.1
1.3.2
1.3.3
1.4
1.5
1.6
1.7
2.1
2.1.1
2.1.1.1
2.1.1.2
2.1.2
2.1.3
2.1.3.1
2.1.3.2
2.1.4
2.1.4.1
2.1.4.2
2.1.4.3
2.1.4.4
2.1.5
2.1.5.1
2.1.5.2
2-6
2.1.5.3
1).
2.1.5.4
2.1.6
2.1.7
2.1.7.1
2.1.7.2
2.1.7.3
2.1.7.4
Paragraph
Number
QUICC Key Features .............................................................................. 1-1
QUICC Architecture Overview................................................................. 1-4
CPU32+ Core.......................................................................................... 1-5
System Integration Module (SIM60)........................................................ 1-5
Communications Processor Module (CPM) ............................................ 1-6
Upgrading Designs from the MC68302 ................................................... 1-6
Architectural Approach ............................................................................ 1-6
Hardware Compatibility Issues................................................................ 1-7
Software Compatibility Issues ................................................................. 1-7
QUICC Glueless System Design............................................................. 1-8
QUICC Serial Configurations .................................................................. 1-9
QUICC Serial Configuration Examples ................................................. 1-16
QUICC System Bus Configurations ...................................................... 1-17
System Bus Signal Index ........................................................................ 2-1
Address Bus ............................................................................................ 2-1
Address Bus (A27–A0)............................................................................ 2-1
Address Bus (A31–A28).......................................................................... 2-1
Function Codes (FC3–FC0) .................................................................... 2-5
Data Bus.................................................................................................. 2-5
Data Bus (D31–D16). .............................................................................. 2-5
Data Bus (D15–D0). ................................................................................ 2-6
Parity ....................................................................................................... 2-6
Parity (PRTY0). ....................................................................................... 2-6
Parity (PRTY1). ....................................................................................... 2-6
Parity (PRTY2). ....................................................................................... 2-6
Parity (PRTY3). ....................................................................................... 2-6
Memory Controller................................................................................... 2-6
Chip Select/Row Address Select (CS6–CS0/RAS6–RAS0) ................... 2-6
Chip Select/Row Address Select/Interrupt Acknowledge (CS7/RAS7/IACK7).
Column Address Select/Interrupt Acknowledge (CAS3–CAS0/IACK6, 3, 2,
2-7
Address Multiplex (AMUX). ..................................................................... 2-7
Interrupt Request Level (IRQ7–IRQ1)..................................................... 2-7
Bus Control Signals................................................................................. 2-7
Data and Size Acknowledge (DSACK1–DSACK0). ................................ 2-8
Autovector/Interrupt Acknowledge (AVEC/IACK5).................................. 2-8
Address Strobe (AS). .............................................................................. 2-8
Data Strobe (DS)..................................................................................... 2-8
Freescale Semiconductor, Inc.
Thi d
For More Information On This Product,
MC68360 USER’S MANUAL
Signal Descriptions
Go to: www.freescale.com
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Introduction
Section 1
Section 2
Title
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M k 4 0 4
Table of Contents
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